Datasheet

IN CH1
IN CH2
IN CH3
IN CH4
IN CH5
IN CH6
IN CH7
IN CH8
ACT1
ACT2
ACT3
ACT4
ACT5
ACT6
ACT7
ACT8
IN1P
IN2P
IN3P
IN4P
IN5P
IN6P
IN7P
IN8P
IN1M
IN2M
IN3M
IN4M
IN5M
IN6M
IN7M
IN8M
AFE5808A
ANALOG INPUTS
ANALOG OUTPUTS
REF/BIAS DECOUPLING
LVDS OUTPUTS
D1P
D1M
D2P
D2M
D3P
D3M
D4P
D4M
D5P
D5M
D6P
D6M
D7P
D7M
D8P
D8M
DCLKM
DCLKP
FCLKM
FCLKP
CW_IP_AMPINP
CW_IP_AMPINM
CW_IP_OUTM
CW_IP_OUTP
REFM
REFP
CLKM
CLKP
AFE5808A
CLOCK
INPUTS
AFE5808A
DIGITAL
INPUTS
CLKM_16X
CLKP_16X
CLKM_1X
CLKP_1X
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
SCLK
SDATA
RESET
SEN
SOUT
PDN_ADC
PDN_VCA
PDN_GLOBAL
AVSS
DVSS
AVSS AVSS AVSS DVSS
OTHER
AFE5808A
OUTPUT
OTHER
AFE5808A
OUTPUT
OTHER
AFE5808A
OUTPUT
DNCs
TO
SUMMING
AMP
C
AC
C
CW
C
CW
C
AC
C
AC
C
AC
R
SUM
C
VCNTL
470pF
C
VCNTL
470pF
R
EXT
(optional)
R
EXT
(optional)
R
SUM
R
SUM
R
SUM
CW_QP_AMPINP
CW_QP_AMPINM
CW_QP_OUTM
CW_QP_OUTP
OTHER
AFE5808A
OUTPUT
TO
SUMMING
AMP
C
AC
C
CW
C
CW
C
AC
C
AC
C
AC
R
SUM
R
EXT
(optional)
R
EXT
(optional)
R
SUM
R
SUM
R
SUM
Clock termination
depends on clock types
LVDS, PECL, or CMOS
5VA
AVDD_5V
AVDD_ADC
AVDD
DVDD
3.3VA
1.8VA 1.8VD
10μF
1μF
1μF
1μF
1μF
1μF
1μF
1μF
1μF
>1μF
0.1μF
0.1 μF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
15nF
15nF
15nF
15nF
15nF
15nF
15nF
15nF
10μF 10μF 10μF
0.1μF
N*0.1 Fμ N*0.1 Fμ N*0.1 Fμ
CM_BYP
VHIGH
VCNTLP IN
VCNTLP
VCNTLM
VREF_IN
R
VCNTL
200Ω
R
VCNTL
200Ω
VCNTLM IN
1.4V
>1μF
AFE5808A
www.ti.com SLOS729B –OCTOBER 2011–REVISED APRIL 2012
APPLICATION INFORMATION
Figure 82. Application Circuit
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 47
Product Folder Links: AFE5808A