Datasheet

AFE5808A
SLOS729B –OCTOBER 2011–REVISED APRIL 2012 www.ti.com
VCA Register Map
Table 4. VCA Register Map
ADDRESS ADDRESS Default
FUNCTION DESCRIPTION
(DEC) (HEX) Value
51[0] 0x33[0] 0 RESERVED 0
51[3:1] 0x33[3:1] 0 LPF_PROGRAMMABILITY 000: 15MHz,
010: 20MHz,
011: 30MHz,
100: 10MHz
51[4] 0x33[4] 0 PGA_INTEGRATOR_DISABLE 0: Enable
(PGA_HPF_DISABLE)
1: Disables offset integrator for PGA. See explanation for the PGA
integrator function in APPLICATION INFORMATION section
51[6:5] 0x33[6:5] 0 PGA_CURRENT_CLAMP_LEVEL 00: –2dBFS;
10: 0dBFS;
01:–4dBFS when 51[7]=0
Note: the current clamp circuit makes sure that PGA output is in linear
range. For example, at 00 setting, PGA output HD3 will be worsen by
3dB at –2dBFS ADC input. In normal operation, the current clamp
function can be set as 00
51[7] 0x33[7] 0 PGA_CURRENT_CLAMP_DISABLE 0:Enables the PGA current clamp circuit;
1:Disables the PGA current clamp circuit before the PGA outputs.
51[6:5] determines the current clamp level
51[13] 0x33[13] 0 PGA_GAIN_CONTROL 0:24dB;
1:30dB.
52[4:0] 0x34[4:0] 0 ACTIVE_TERMINATION_ See Table 6 Reg 52[5] should be set as '1' to access these bits
INDIVIDUAL_RESISTOR_CNTL
52[5] 0x34[5] 0 ACTIVE_TERMINATION_ 0: Disables;
INDIVIDUAL_RESISTOR_ENABLE
1: Enables internal active termination individual resistor control
52[7:6] 0x34[7:6] 0 PRESET_ACTIVE_ TERMINATIONS 00: 50ohm,
01: 100ohm,
10: 200ohm,
11: 400ohm.
(Note: the device will adjust resistor mapping (52[4:0]) automatically.
50ohm active termination is NOT supported in 12dB LNA setting.
Instead, '00' represents high impedance mode when LNA gain is 12dB)
52[8] 0x34[8] 0 ACTIVE TERMINATION ENABLE 0: Disables;
1: Enables active termination
52[10:9] 0x34[10:9] 0 LNA_INPUT_CLAMP_SETTING 00: Auto setting,
01: 1.5Vpp,
10: 1.15Vpp and
11: 0.6Vpp
52[11] 0x34[11] 0 RESERVED Set to 0
52[12] 0x34[12] 0 LNA_INTEGRATOR_DISABLE 0: Enables;
(LNA_HPF_DISABLE)
1: Disables offset integrator for LNA. See the explanation for this
function in the following section
52[14:13] 0x34[14:13] 0 LNA_GAIN 00: 18dB;
01: 24dB;
10: 12dB;
11: Reserved
52[15] 0x34[15] 0 LNA_INDIVIDUAL_CH_CNTL 0: Disable;
1: Enable LNA individual channel control. See Register 57 for details
53[7:0] 0x35[7:0] 0 PDN_CH<7:0> 0: Normal operation;
1: Powers down corresponding channels. Bit7→CH8,
Bit6→CH7…Bit0→CH1. PDN_CH will shut down whichever blocks are
active depending on TGC mode or CW mode
53[8] 0x35[8] 0 RESERVED Set to 0
53[9] 0x35[9] 0 RESERVED Set to 0
53[10] 0x35[10] 0 LOW_POWER 0: Low noise mode;
1: Sets to low power mode (53[11]=0). At 30dB PGA, total chain gain
may slightly change.
See typical characteristics
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