Datasheet

ADC
V
CM0
(+2.5V)
Amplifier
0
90
IandQ
Channel
ADC
AFE5805
CWOut
8InBy10Out
CW0
CW1
CW2
CW3
CW4
CW5
CW6
CW7
CW8
CW9
AFE5805
CWOut
8InBy10Out
CW0
CW1
CW2
CW3
CW4
CW5
CW6
CW7
CW8
CW9
Passive
Delay
Line
Clock
L=220 Hm
AFE5805
SBOS421D –MARCH 2008–REVISED MARCH 2010 www.ti.com
The resulting signal current then passes through the After summing, the CW signal path further consists of
8×10 switch matrix. Depending on the programmed a high dynamic range mixer for down-conversion to
configuration of the switch matrix, any V/I amplifier I/Q base-band signals. The I/Q signals are then
current output can be connected to any of 10 CW band-limited (that is, low-frequency contents are
outputs. This design is a simple current-summing removed) in a filter stage that precedes a pair of
circuit such that each CW output can represent the high-resolution, low sample rate ADCs.
sum of any or all of the channel currents. The CW
outputs are typically routed to a passive LC delay
line, allowing coherent summing of the signals.
Figure 53. Conceptual CW Doppler Signal Path Using Current Summing and a Passive Delay Line for
Beamforming
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