Datasheet

AFE5805
SBOS421D MARCH 2008REVISED MARCH 2010
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ANALOG-TO-DIGITAL CONVERSION devices without having to externally drive and route
reference lines. The nominal values of REFT and
The analog-to-digital converter (ADC) of the AFE5805
REFB are 2.5V and 0.5V, respectively. The
employs a pipelined converter architecture that
references are internally scaled down differentially by
consists of a combination of multi-bit and single-bit
a factor of 2. V
CM
(the common-mode voltage of
internal stages. Each stage feeds its data into the
REFT and REFB) is also made available externally
digital error correction logic, ensuring excellent
through a pin, and is nominally 1.5V.
differential linearity and no missing codes at the
12-bit level. The ADC output goes to a serializer that operates
from a 12x clock generated by the PLL. The 12 data
The 12 bits given out by each channel are serialized
bits from each channel are serialized and sent LSB
and sent out on a single pair of pins in LVDS format.
first. In addition to serializing the data, the serializer
All eight channels of the AFE5805 operate from a
also generates a 1x clock and a 6x clock. These
common input clock (CLKP/M). The sampling clocks
clocks are generated in the same way the serialized
for each of the eight channels are generated from the
data are generated, so these clocks maintain perfect
input clock using a carefully matched clock buffer
synchronization with the data. The data and clock
tree. The 12x clock required for the serializer is
outputs of the serializer are buffered externally using
generated internally from CLKP/M using a
LVDS buffers. Using LVDS buffers to transmit data
phase-locked loop (PLL). A 6x and a 1x clock are
externally has multiple advantages, such as a
also output in LVDS format, along with the data, to
reduced number of output pins (saving routing space
enable easy data capture. The AFE5805 operates
on the board), reduced power consumption, and
from internally-generated reference voltages that are
reduced effects of digital noise coupling to the analog
trimmed to improve the gain matching across
circuit inside the AFE5805.
devices, and provide the option to operate the
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