Datasheet

AFE5805
www.ti.com SBOS421D –MARCH 2008–REVISED MARCH 2010
SERIAL REGISTER MAP
Table 2. SUMMARY OF FUNCTIONS SUPPORTED BY SERIAL INTERFACE
(1) (2) (3) (4)
ADDRESS
IN HEX D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 NAME DESCRIPTION DEFAULT
00 X S_RST Self-clearing software RESET. Inactive
RES_
03 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VCA
VCA_SDATA D5 = 1
16 X X X X X X X X X X X X X X 1 1 See Table 4 information
<0:15> (TGC mode)
VCA_SDATA
17 X X X X X X X X X X X X X X X X See Table 4 information
<16:31>
VCA_DATA
18 X X X X X X X X See Table 4 information
<32:39>
Channel-specific ADC
X X X X PDN_CH<1:4> Inactive
power-down mode.
Channel-specific ADC
x X X X X PDN_CH<8:5> Inactive
power-down mode.
Partial power-down mode (fast
0F X PDN_PARTIAL Inactive
recovery from power-down).
Register mode for complete
0 X PDN_COMPLETE Inactive
power-down (slower recovery).
Configures the PD pin for Complete
X 0 PDN_PIN_CFG
partial power-down mode. power-down
LVDS current drive
X X X ILVDS_LCLK<2:0> programmability for LCLKM 3.5mA drive
and LCLKP pins.
LVDS current drive
ILVDS_FRAME
11 X X X programmability for FCLKM 3.5mA drive
<2:0>
and FCLKP pins.
LVDS current drive
X X X ILVDS_DAT<2:0> programmability for OUTM and 3.5mA drive
OUTP pins.
Enables internal termination Termination
X EN_LVDS_TERM
for LVDS buffers. disabled
Programmable termination for Termination
1 X X X TERM_LCLK<2:0>
LCLKM and LCLKP buffers. disabled
12
TERM_FRAME Programmable termination for Termination
1 X X X
<2:0> FCLKM and FCLKP buffers. disabled
Programmable termination for Termination
1 X X X TERM_DAT<2:0>
OUTM and OUTP buffers. disabled
Channel-specific,
X X X X LFNS_CH<1:4> low-frequency noise Inactive
suppression mode enable.
14
Channel-specific,
x X X X X LFNS_CH<8:5> low-frequency noise Inactive
suppression mode enable.
Enables a repeating full-scale
X 0 0 EN_RAMP Inactive
ramp pattern on the outputs.
Enables the mode wherein the
DUALCUSTOM_
0 X 0 output toggles between two Inactive
PAT
defined codes.
Enables the mode wherein the
SINGLE_CUSTOM
0 0 X output is a constant specified Inactive
25 _PAT
code.
2MSBs for a single custom
BITS_CUSTOM1 pattern (and for the first code
X X Inactive
<11:10> of the dual custom pattern).
<11> is the MSB.
BITS_CUSTOM2 2MSBs for the second code of
X X Inactive
<11:10> the dual custom pattern.
10 lower bits for the single
BITS_CUSTOM1 custom pattern (and for the
26 X X X X X X X X X X Inactive
<9:0> first code of the dual custom
pattern). <0> is the LSB.
10 lower bits for the second
BITS_CUSTOM2
27 X X X X X X X X X X code of the dual custom Inactive
<9:0>
pattern.
(1) The unused bits in each register (identified as blank table cells) must be programmed as '0'.
(2) X = Register bit referenced by the corresponding name and description (default setting is listed above).
(3) Bits marked as '0' should be forced to 0, and bits marked as '1' should be forced to 1 when the particular register is programmed.
(4) Multiple functions in a register should be programmed in a single write operation.
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