Datasheet

AFE5804
www.ti.com SBOS442C –JUNE 2008–REVISED OCTOBER 2011
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (November 2008) to Revision C Page
• Changed CW—Signal Channels, Output transconductance parameter symbol in Electrical Characteristics table ............. 4
• Changed t
PROP
test conditions in 40MSPS/50MSPS LVDS Output Timing Characteristics table ...................................... 13
• Changed t
PROP
test conditions in 30MSPS/20MSPS/10MSPS LVDS Output Timing Characteristics table ....................... 13
• Updated Figure 82 .............................................................................................................................................................. 27
• Added list item 3 and Table 2 to Register Initialization section .......................................................................................... 30
• Updated Figure 92 .............................................................................................................................................................. 30
• Updated footnote 2 of Table 3 ............................................................................................................................................ 32
• Added last bullet item in list after Table 4 ........................................................................................................................... 34
• Changed ADC_RESET to ADS_RESET in second bullet of VCA Reset section .............................................................. 34
• Added Table 21 and updated Clock Jitter, Power Noise, SNR, and LVDS Timing section description ............................. 57
Changes from Revision A (September 2008) to Revision B Page
• Changed VCM to V
CM
in Internal Reference Voltages (ADC) section of Electrical Characteristics table ............................ 4
• Corrected VCM pin name in functional block diagram ......................................................................................................... 7
• Changed AVDD2 to AVDD1 in description column of L9 row of Table 1 ........................................................................... 10
• Changed AVDD2 to AVDD1 in Figure 92 ........................................................................................................................... 30
• Corrected VCM pin name in Summary of Features table ................................................................................................... 33
• Changed VCM to CM in External Reference section ......................................................................................................... 43
• Changed VCM to V
CM
in the Analog-to-Digital Conversion section .................................................................................... 50
• Changed 30pF to 16pF in third paragraph of Analog Input and LNA section .................................................................... 51
• Changed VCM to V
CM
in third paragraph of Clock Input section ........................................................................................ 55
• Updated VCM to the proper pin name in Figure 106 .......................................................................................................... 55
• Corrected VCM pin name in the Reference Circuit section ................................................................................................ 56
• Corrected VCMpin name in Table 20 ................................................................................................................................. 57
• Added Clock Jitter, Power Noise, SNR, and LVDS Timing section .................................................................................... 57
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