Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - Analog front end (AFE) 12 Bit NFBGA 135

VREFT=1.5V+

1.5V

VREFB=1.5V -

1.5V

REFT REFB

SET

0.1 Fm 2.2 Fm

56.2kW

2.2 Fm 0.1 Fm

AFE5804

+ +

AFE5804

SBOS442C –JUNE 2008–REVISED OCTOBER 2011

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REFERENCE CIRCUIT The device also supports the use of external

reference voltages. There are two methods to force

The digital beam-forming algorithm in an ultrasound

the references externally. The first method involves

system relies on gain matching across all receiver

pulling INT/EXT low and forcing externally REFT and

channels. A typical system has approximately 12

REFB to 2.5V and 0.5V nominally, respectively. In

octal AFEs on the board. In such a case, it is critical

this mode, the internal reference buffer goes to a

to ensure that the gain is matched, essentially

3-state output. The external reference driving circuit

requiring the reference voltages seen by all the AFEs

should be designed to provide the required switching

to be the same. Matching references within the eight

current for the eight ADCs inside the AFE5804. It

channels of a chip is done by using a single internal

should be noted that in this mode, CM and ISET

reference voltage buffer. Trimming the reference

continue to be generated from the internal bandgap

voltages on each chip during production ensures that

voltage, as in the internal reference mode. It is

the reference voltages are well-matched across

therefore important to ensure that the common-mode

different chips.

voltage of the externally-forced reference voltages

matches to within 50mV of V

All bias currents required for the internal operation of

the device are set using an external resistor to

The second method of forcing the reference voltages

ground at the ISET pin. Using a 56kΩ resistor on

externally can be accessed by pulling INT/EXT low,

ISET generates an internal reference current of 20μA.

and programming the serial interface to drive the

This current is mirrored internally to generate the bias

external reference mode through the CM pin (register

current for the internal blocks. Using a larger external

bit called EXT_REF_VCM). In this mode, CM

resistor at ISET reduces the reference bias current

becomes configured as an input pin that can be

and thereby scales down the device operating power.

driven from external circuitry. The internal reference

However, it is recommended that the external resistor

buffers driving REFT and REFB are active in this

be within 10% of the specified value of 56kΩ so that

mode. Forcing 1.5V on the CM pin in the mode

the internal bias margins for the various blocks are

results in REFT and REFB coming to 2.5V and 0.5V,

proper.

respectively. In general, the voltages on REFT and

REFB in this mode are given by Equation 3 and

Buffering the internal bandgap voltage also generates

Equation 4:

the common-mode voltage V

, which is set to the

midlevel of REFT and REFB. It is meant as a

reference voltage to derive the input common-mode if

(3)

the input is directly coupled. It can also be used to

derive the reference common-mode voltage in the

external reference mode. Figure 109 shows the

(4)

suggested decoupling for the reference pins.

The state of the reference voltage internal buffers

during various combinations of the PD, INT/EXT, and

EXT_REF_VCM register bits is described in Table 20.

Figure 109. Suggested Decoupling on the Reference Pins