Datasheet

LNA
R
S
R
S
R
F
C
F
To
PGA
Attenuator
VCNTL
AFE5804
AFE5804
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SBOS442C JUNE 2008REVISED OCTOBER 2011
VCAGAIN CONTROL When the AFE5804 operates in CW mode, the
attenuator stage remains connected to the LNA
The attenuator (VCA) for each of the eight channels
outputs. Therefore, it is recommended to set the
of the AFE5804 is controlled by a single-ended
V
CNTL
voltage to +1.2V in order to minimize the
control signal input, the V
CNTL
pin. The control voltage
internal loading of the LNA outputs. Small
range spans from 0V to 1.2V, referenced to ground.
improvements in reduced power dissipation and
This control voltage varies the attenuation of the VCA
improved distortion performance may also be
based on its linear-in-dB characteristic with its
realized.
maximum attenuation (minimum gain) at V
CNTL
= 0V,
and minimum attenuation (maximum gain) at V
CNTL
=
1.2V. Table 19 shows the nominal gains for each of
the four PGA gain settings. The total gain range is
typically 46dB and remains constant independent of
the PGA selected; the Max Gain column reflects the
absolute gain of the full signal path comprised of the
fixed LNA gain of 20dB and the programmable PGA
gain.
Table 19. Nominal Gain Control Ranges for Each
of the Four PGA Gain Settings
MIN GAIN MAX GAIN AT
PGA GAIN AT V
CNTL
= 0V V
CNTL
= 1.2V
20dB 5.5dB 40.5dB
25dB 1.0dB 45.0dB
27dB 1.0dB 47.0dB
30dB 3.0dB 49.0dB
As previously discussed, the VCA architecture uses
eight attenuator segments that are equally spaced in
Figure 103. External Filtering of the V
CNTL
Input
order to approximate the linear-in-dB gain-control
slope. This approximation results in a monotonic
slope; gain ripple is typically less than ±0.5dB.
CW DOPPLER PROCESSING
The AFE5804 gain-control input has a 3dB
The AFE5804 integrates many of the elements
bandwidth of approximately 1.5MHz. This wide
necessary to allow for the implementation of a CW
bandwidth, although useful in many applications, can
doppler processing circuit, such as a V/I converter for
allow high-frequency noise to modulate the gain
each channel and a cross-point switch matrix with an
control input. In practice, this modulation can easily
8-input into 10-output (8×10) configuration.
be avoided by additional external filtering (R
F
and C
F
)
of the control input, as Figure 103 shows. Stepping
In order to switch the AFE5804 from the default TGC
the control voltage from 0V to 1.2V, the gain control
mode operation into CW mode, bit D5 of the control
response time is typically less than 500ns to settle
register must be updated to low ('0'). This setting also
within 10% of the final signal level of a 1V
PP
enables access to all other registers that determine
(6dBFS) output.
the switch matrix configuration (see the Input Register
Bit Map tables). In order to process CW signals, the
The control voltage input (VCNTL pin) represents a
LNA internally feeds into a differential V/I amplifier
high-impedance input. Multiple AFE5804 devices can
stage. The transconductance of the V/I amplifier is
be connected in parallel with no significant loading
typically 13.5mA/V with a 100mV
PP
input signal. For
effects using the VCNTL pin of each device. Note that
proper operation, the CW outputs must be connected
when the V
CNTL
pin is left unconnected, it floats up to
to an external bias voltage of +2.5V. Each CW output
a potential of about +3.7V. For any voltage level
is designed to sink a small dc current of 0.9mA, and
above 1.2V and up to 5.0V, the VCA continues to
can deliver a signal current up to 2.9mA
PP
.
operate at its minimum attenuation level; however, it
is recommended to limit the voltage to approximately
1.5V or less.
Copyright © 20082011, Texas Instruments Incorporated 53