Datasheet

Overview www.ti.com
17 Bottom Layer - Signal..................................................................................................... 25
18 Schematic 1 of 9........................................................................................................... 26
19 Schematic 2 of 9........................................................................................................... 27
20 Schematic 3 of 9........................................................................................................... 28
21 Schematic 4 of 9 (Not applicable to AFE5803) ....................................................................... 29
22 Schematic 5 of 9........................................................................................................... 30
23 Schematic 6 of 9(Not applicable to AFE5803)......................................................................... 31
24 Schematic 7 of 9........................................................................................................... 32
25 Schematic 8 of 9(Not applicable to AFE5803)......................................................................... 33
26 Schematic 9 of 9........................................................................................................... 34
List of Tables
1 Input/Output, Power, and USB .......................................................................................... 15
2 PGATestMode, ADC Clock .............................................................................................. 16
3 Vcntl ......................................................................................................................... 17
4 LED Indicators ............................................................................................................. 18
5 Test Points ................................................................................................................. 19
6 Bill of Materials............................................................................................................. 35
1 Overview
This document is intended to guide users step-by-step through the AFE5803EVM Evaluation Module
(EVM) setup and test . The EVM is shipped with a default configuration from the manufacturer. With this
configuration, the onboard CMOS clock is used for a analog-to-digital converter sampling clock. No
external clock generator is required. Users need to provide the input signal for measurement from a signal
generator.
Detail explanation regarding the jumpers, connectors, and test points appear in Section 11. The graphical
user interface (GUI) can be downloaded from the TI Web site.
2 Default Configuration
Figure 1 shows the default configuration of the EVM from the factory. The accompanying list identifies the
basic components on the EVM board.
2
AFE5803EVM (Revision E ) Evaluation Module SLOU332A– January 2012– Revised January 2012
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated