Datasheet
A7 A6 A1 A0
SPISTE
SPISIMO
SCLK
'RQ¶WFDUH, can be high or low.
D23 D22 D17 D16 D15 D14 D9 D8 D7 D6 D1 D0
SPISOMI
AFE4490
SBAS602F –DECEMBER 2012–REVISED OCTOBER 2013
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Reading Data
The SPI_READ register bit must be first set to '1' before reading from a register. The AFE4490 includes a mode
where the contents of the internal registers can be read back on the SPISOMI pin. This mode may be useful as a
diagnostic check to verify the serial interface communication between the external controller and the AFE. To
enable this mode, first set the SPI_READ register bit using the SPI write command, as described in the Writing
Data section. In the next command, specify the SPI register address with the desired content to be read. Within
the same SPI command sequence, the AFE outputs the contents of the specified register on the SPISOMI pin.
Figure 79 shows an SPI timing diagram for a single read operation. For multiple read and write cycles, refer to
the Multiple Data Reads and Writes section.
(1) The SPI_READ register bit must be enabled before attempting a serial readout from the AFE.
(2) Specify the register address of the content that must be readback on bits A[7:0].
(3) The AFE outputs the contents of the specified register on the SPISOMI pin.
Figure 79. AFE SPI Read Timing Diagram
(1)(2)(3)
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