Datasheet
AFE4490
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SBAS602F –DECEMBER 2012–REVISED OCTOBER 2013
Using the Timer Module
The timer module registers can be used to program the start and end instants in units of 4-MHz clock cycles.
These timing instants and the corresponding registers are listed in Table 3.
Note that the device does not restrict the values in these registers; thus, the start and end edges can be
positioned anywhere within the pulse repetition period. Care must be taken by the user to program suitable
values in these registers to avoid overlapping the signals and to make sure none of the edges exceed the value
programmed in the PRP register. Writing the same value in the start and end registers results in a pulse duration
of one clock cycle. The following steps describe the timer sequencing configuration:
1. With respect to the start of the PRP period (indicated by timing instant t
0
in Figure 62), the sequence of
conversions must be followed in order: convert LED2 → LED2 ambient → LED1 → LED1 ambient.
2. Also, starting from t
0
, the sequence of sampling instants must be staggered with respect to the respective
conversions as follows: sample LED2 ambient → LED1 → LED1 ambient → LED2.
3. Finally, align the edges for the two LED pulses with the respective sampling instants.
Table 3. Clock Edge Mapping to SPI Registers
TIME INSTANT
(See Figure 62 and EXAMPLE
(1)
Figure 63) DESCRIPTION CORRESPONDING REGISTER ADDRESS AND REGISTER BITS (Decimal)
t
0
Start of pulse repetition period No register control —
t
1
Start of sample LED2 pulse Sample LED2 start count (bits 15-0 of register 01h) 6000
t
2
End of sample LED2 pulse Sample LED2 end count (bits 15-0 of register 02h) 7999
t
3
Start of LED2 pulse LED2 start count (bits 15-0 of register 03h) 6000
t
4
End of LED2 pulse LED2 end count (bits 15-0 of register 04h) 7998
t
5
Start of sample LED2 ambient pulse Sample ambient LED2 start count (bits 15-0 of register 05h) 0
t
6
End of sample LED2 ambient pulse Sample ambient LED2 end count (bits 15-0 of register 06h) 1998
t
7
Start of sample LED1 pulse Sample LED1 start count (bits 15-0 of register 07h) 2000
t
8
End of sample LED1 pulse Sample LED1 end count (bits 15-0 of register 08h) 3998
t
9
Start of LED1 pulse LED1 start count (bits 15-0 of register 09h) 2000
t
10
End of LED1 pulse LED1 end count (bits 15-0 of register 0Ah) 3999
t
11
Start of sample LED1 ambient pulse Sample ambient LED1 start count (bits 15-0 of register 0Bh) 4000
t
12
End of sample LED1 ambient pulse Sample ambient LED1 end count (bits 15-0 of register 0Ch) 5998
LED2 convert start count (bits 15-0 of register 0Dh)
t
13
Start of convert LED2 pulse 2
Must start one AFE clock cycle after the ADC reset pulse ends.
t
14
End of convert LED2 pulse LED2 convert end count (bits 15-0 of register 0Eh) 1999
LED2 ambient convert start count (bits 15-0 of register 0Fh)
t
15
Start of convert LED2 ambient pulse 2002
Must start one AFE clock cycle after the ADC reset pulse ends.
t
16
End of convert LED2 ambient pulse LED2 ambient convert end count (bits 15-0 of register 10h) 3999
LED1 convert start count (bits 15-0 of register 11h)
t
17
Start of convert LED1 pulse 4002
Must start one AFE clock cycle after the ADC reset pulse ends.
t
18
End of convert LED1 pulse LED1 convert end count (bits 15-0 of register 12h) 5999
LED1 ambient convert start count (bits 15-0 of register 13h)
t
19
Start of convert LED1 ambient pulse 6002
Must start one AFE clock cycle after the ADC reset pulse ends.
t
20
End of convert LED1 ambient pulse LED1 ambient convert end count (bits 15-0 of register 14h) 7999
t
21
Start of first ADC conversion reset pulse ADC reset 0 start count (bits 15-0 of register 15h) 0
t
22
End of first ADC conversion reset pulse ADC reset 0 end count (bits 15-0 of register 16h) 2
t
23
Start of second ADC conversion reset pulse ADC reset 1 start count (bits 15-0 of register 17h) 2000
t
24
End of second ADC conversion reset pulse ADC reset 1 end count (bits 15-0 of register 18h) 2002
t
25
Start of third ADC conversion reset pulse ADC reset 2 start count (bits 15-0 of register 19h) 4000
t
26
End of third ADC conversion reset pulse ADC reset 2 end count (bits 15-0 of register 1Ah) 4002
t
27
Start of fourth ADC conversion reset pulse ADC reset 3 start count (bits 15-0 of register 1Bh) 6000
t
28
End of fourth ADC conversion reset pulse ADC reset 3 end count (bits 15-0 of register 1Ch) 6002
t
29
End of pulse repetition period Pulse repetition period count (bits 15-0 of register 1Dh) 7999
(1) Values are based off of a pulse repetition frequency (PRF) = 500 Hz and duty cycle = 25%.
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