Datasheet

CS
DAC
DIN
SCLK
Time
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
AFE031
www.ti.com SBOS531D –AUGUST 2010–REVISED MAY 2012
NOTE: Dashed lines indicate optional additional clocks (data are ignored).
Figure 35. Writing to the DAC Register
Table 6 lists the DAC Register configurations.
Table 6. DAC Registers
DAC PIN HIGH:
DAC REGISTER <15:0>
LOCATION
BIT NAME (0 = LSB) DEFAULT R/W FUNCTION
DAC<0> 0 -- W Truncated
DAC<1> 1 -- W Truncated
DAC<2> 2 -- W Truncated
DAC<3> 3 -- W Truncated
DAC<4> 4 -- W Truncated
DAC<5> 5 -- W Truncated
DAC<6> 6 -- W DAC bit 0 = DAC LSB
DAC<7> 7 -- W DAC bit 1
DAC<8> 8 -- W DAC bit 2
DAC<9> 9 -- W DAC bit 3
DAC<10> 10 -- W DAC bit 4
DAC<11> 11 -- W DAC bit 5
DAC<12> 12 -- W DAC bit 6
DAC<13> 13 -- W DAC bit 7
DAC<14> 14 -- W DAC bit 8
DAC<15> 15 -- W DAC bit 9 = DAC MSB
Copyright © 2010–2012, Texas Instruments Incorporated 29
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