Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- ELECTRICAL CHARACTERISTICS: Transmitter (Tx)
- ELECTRICAL CHARACTERISTICS: Power Amplifier (PA)
- ELECTRICAL CHARACTERISTICS: Receiver (Rx)
- ELECTRICAL CHARACTERISTICS: Digital
- ELECTRICAL CHARACTERISTICS: Two-Wire Interface
- ELECTRICAL CHARACTERISTICS: Internal Bias Generator
- ELECTRICAL CHARACTERISTICS: Power Supply
- THERMAL INFORMATION
- SPI TIMING REQUIREMENTS
- DEVICE INFORMATION
- TYPICAL CHARACTERISTICS
- APPLICATION INFORMATION
- Revision History
Serial
Interface
Serial
Interface
DAC PGA
PGA
PGA
LPF
LPF
PA
Line Coupling Interface
+ +
N1 N2
Bandpass Filter
C2000 MCU
AFE031
Phase
Neutral
AFE031
SBOS531D –AUGUST 2010–REVISED MAY 2012
www.ti.com
APPLICATION INFORMATION
GENERAL DESCRIPTION
The AFE031 is an integrated powerline communication analog front-end (AFE) device built from a variety of
functional blocks that work in conjunction with a microcontroller. The AFE031 provides the interface between the
microcontroller and a line coupling circuit. The AFE031 delivers high performance and is designed to work with a
minimum number of external components. Consisting of a variety of functional and configurable blocks, the
AFE031 simplifies design efforts and reduces the time to market of many applications.
The AFE031 includes three primary functional blocks:
• Power Amplifier (PA)
• Transmitter (Tx)
• Receiver (Rx)
The AFE031 also consists of other support circuitry blocks that provide zero crossing detection, an additional
two-wire communications channel, and power-saving biasing blocks (see the Functional Block Diagram). All of
these functional blocks are digitally controlled by the microcontroller through the serial interface (SPI).
Figure 24 shows a typical powerline communications application system diagram. Table 1 is a complete list of
the sections within the AFE031.
Figure 24. Typical Powerline Communications System Diagram
Table 1. Block Descriptions
BLOCK DESCRIPTION
PA The PA block includes the power amplifier and associated pedestal biasing circuitry
Tx The Tx block includes the Tx_Filter and the Tx_PGA
Rx The Rx block includes the Rx PGA1, the Rx Filter, and the Rx PGA2
ERx The ER block includes the two-wire receiver
ETx The ER block includes the two-wire transmitter
DAC The DAC block includes a digital-to-analog converter
ZC The ZC block includes both zero crossing detectors
REF1 The REF1 block includes the internal bias generator for the PA block
The REF2 block includes the internal bias generators for the Tx, Rx, ERx, and ETx
REF2
blocks
20 Copyright © 2010–2012, Texas Instruments Incorporated
Product Folder Link(s): AFE031