Datasheet

CS
DAC
DIN
SCLK
Time
AFE030
SBOS588A –DECEMBER 2011– REVISED DECEMBER 2011 www.ti.com
Refer to Figure 35 for an illustration of this sequence.
Figure 35. Writing to the DAC Register
Table 6 lists the DAC Register configurations.
Table 6. DAC Registers
DAC PIN HIGH:
DAC REGISTER <15:0>
LOCATION
BIT NAME (0 = LSB) DEFAULT R/W FUNCTION
DAC<0> 0 — W Truncated
DAC<1> 1 — W Truncated
DAC<2> 2 — W Truncated
DAC<3> 3 — W Truncated
DAC<4> 4 — W Truncated
DAC<5> 5 — W Truncated
DAC<6> 6 — W DAC bit 0 = DAC LSB
DAC<7> 7 — W DAC bit 1
DAC<8> 8 — W DAC bit 2
DAC<9> 9 — W DAC bit 3
DAC<10> 10 — W DAC bit 4
DAC<11> 11 — W DAC bit 5
DAC<12> 12 — W DAC bit 6
DAC<13> 13 — W DAC bit 7
DAC<14> 14 — W DAC bit 8
DAC<15> 15 — W DAC bit 9 = DAC MSB
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