Datasheet

ADS931
9
SBAS060A
R
1
1k
Ω
OPA680
V
IN
R
F
402
Ω
V
CM
C
1
0.1µF
0.1µF
IN
CM
+5V
R
S
50
Ω
+5V
R
G
402
Ω
C
G
0.1µF
22pF
ADS931
R
P
(1)
402
Ω
NOTE: (1) See text for discussion.
The pipelined quantizer architecture has 7 stages with each
stage containing a two-bit quantizer and a two bit digital-
to-analog converter, as shown in Figure 2. Each two-bit
quantizer stage converts on the edge of the sub-clock, which
is the same frequency of the externally applied clock. The
output of each quantizer is fed into its own delay line to
time-align it with the data created from the subsequent
quantizer stages. This aligned data is fed into a digital error
correction circuit which can adjust the output data based on
the information found on the redundant bits. This technique
provides the ADS931 with excellent differential linearity
and guarantees no missing codes at the 8-bit level.
To accommodate a bipolar signal swing, the ADS931 oper-
ates with a common-mode voltage (V
CM
) which is derived
from the external references. Due to the symmetric resistor
ladder inside the ADS931, V
CM
is situated between the top
and bottom reference voltage. Equation 1 can be used for
calculating the common-mode voltage level.
V
CM
= (REFT +REFB)/2 (1)
At the same time, the two external reference voltage levels
define the full-scale input range for the ADS931. This makes
it possible for the input range to be adapted to the signal
swing of the front end.
APPLICATIONS
SIGNAL SWING AND COMMON-MODE
CONSIDERATIONS
The ADS931 is primarily designed and specified for a +3V
single supply voltage. However, due to its supply range of
+2.7V to +5.25V, it is well suited for +5V applications. The
nominal input signal swing is 1Vp-p, situated between +1V
and +2V. This means that the signal swings ±0.5V around a
common-mode voltage of +1.5V when using a 3V rail, or
typically +2.75V on a 5V supply. In some applications, it
might be advantageous to increase the input signal swing.
For example, increasing it to 2Vp-p may improve the achiev-
able signal-to-noise performance. However, consideration
should be given to keeping the signal swing within the linear
range of operation of the driving circuitry to avoid any
excessive distortion. In extreme situations, the performance
of the converter will start to degrade due to large variations
of the input’s switch ON resistance over the input voltage.
Therefore, the signal swing should remain approximately
0.5V away from each rail during normal operation.
DRIVING THE ANALOG INPUTS
AC-COUPLED DRIVER
Figure 3 shows an example of an ac-coupled, single-ended
interface circuit using a high speed op amp which operates
on dual supplies (OPA650, OPA658). The mid-point refer-
ence voltage, (V
CM
), biases the bipolar, ground-referenced
input signal. The capacitor C
1
and resistor R
1
form a high-
pass filter with the –3dB frequency set at
f
–3dB
= 1/(2 π R
1
C
1
)(2)
The values for C
1
and R
1
are not critical in most applications
and can be set freely. The values shown in Figure 3 corre-
spond to a corner frequency of 1.6kHz.
FIGURE 4. +5V Single-Supply Interface Circuit Example Using the Voltage Feedback Amplifier OPA680.
Figure 4 depicts a circuit that can be used in single-supply
applications. The mid-reference voltage biases the op amp
up to the appropriate common-mode voltage, for example
V
CM
= +1.5V. With the use of capacitor C
G
, the DC gain for
the non-inverting op amp input is set to +1V/V. As a result,
the transfer function is modified to
V
OUT
= V
IN
{(1 + R
F
/R
G
) + V
CM
}(3)
FIGURE 3. AC-Coupled, Single-Ended Interface Circuit.
402Ω
OPA65x
V
IN
402Ω
R
1
1kΩ
V
CM
C
1
0.1µF
0.1µF
IN
CM
+5V
R
S
50Ω
–5V
+V
S
ADS931