User's Guide SBAU211 – June 2013 ADS8881EVM-PDK ADS8881EVM-PDK This user's guide describes the operation and use of the ADS8881 evaluation module (EVM). ADS8881 is an 18-bit true-differential unipolar successive approximation register (SAR) analog-to-digital converter (ADC) with a maximum throughput of 1 MSPS. It is a very low power ADC with excellent noise and distortion performance for ac or dc signals.
www.ti.com 1 2 3 4 5 6 7 8 Contents ADS8881EVM-PDK Overview ............................................................................................. 3 EVM Analog Interface ...................................................................................................... 4 EVM Digital Interface ....................................................................................................... 6 EVM Power Supply Inputs ............................................................................
ADS8881EVM-PDK Overview www.ti.com 1 ADS8881EVM-PDK Overview The ADS8881EVM is an evaluation module built to the TI Modular EVM system specifications. The EVM by itself has no microprocessor and cannot run software. Thus, it is available as part of the ADS8881EVMPDK kit that combines the ADS8881EVM as a daughter board with the DSP-based MMB0 motherboard using ADCPro™ software as graphical user interface (GUI). ADCPro software collects, records, and analyzes data from ADC evaluation boards.
EVM Analog Interface 2 www.ti.com EVM Analog Interface The ADS8881EVM is designed for easy interfacing to multiple analog sources. SMA connectors allow the EVM to have input signals connected through coaxial cables. In addition, the Samtec connector provides a convenient 10-pin, dual-row, header/socket combination at J1. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options.
EVM Analog Interface www.ti.com 2.2 Single Ended Signal Configuration The ADS8881 can only convert single ended signals between 0 V and VREF. The THS4521 can condition a single ended to a differential signal allowing a larger input voltage range for the EVM input A0(+). The single ended signal range can be 0 V to 8.6 V or –4.3 V to 4.3 V to avoid saturating amplifier output. The EVM A0(-) input should be grounded for single-ended signals as illustrated in Figure 2. 4.3V 2.
EVM Digital Interface 3 www.ti.com EVM Digital Interface Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide a convenient 10-pin, dualrow, header and socket combinations at P1. The header and/or socket provides access to the digital control pins of the ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. Table 3 summarizes the pinouts for digital interface J2. Table 3. J2: Serial Interface Header 3.
EVM Power Supply Inputs www.ti.com 4 EVM Power Supply Inputs J3 is the power-supply input connector. Table 4 lists the configuration details for J3. Table 4. J3: Power-Supply Interface Header 4.1 Pin Number Pin Name J3.3 +5VA 5-V analog supply Yes J3.5 GND Digital ground input Yes J3.6 GND Analog ground input Yes J3.7 1.8 VD 1.8-V digital supply Optional 3.3-V digital supply Yes 5-V digital supply No Unused No J3.9 3.3 VD J3.10 5 VD P3.1-2, P3.4, and P3.
EVM Digital Configuration 5 www.ti.com EVM Digital Configuration The EVM offers two jumpers (JP2 and JP3) to configure the EVM in either 3-wire SPI mode or 4-wire SPI mode. By default, the EVM jumper settings are 3-wire. JP1 only establishes the pin that carries the chipselect signal from the J2 header. 5.1 SPI 3-Wire Mode (JP2:2–3 and JP3:OPEN) The chip-select signal is used to bring the ADS8881 digital output out of Tri-State and initialize conversions.
PDK Kit Setup www.ti.com 6 PDK Kit Setup CAUTION Do not connect the ADS8881EVM-PDK to a PC before completing Section 6. Failure to observe this caution may cause Microsoft Windows to disregard the ADS8881EVM-PDK as a connected device. This section presents the steps required to set up the ADS8881EVM-PDK kit before operating it.Section 7 explains how to operate the kit to acquire and analyze data.
PDK Kit Setup 6.3 www.ti.com Configuring the ADS8881EVM-PDK Hardware The ADS8881EVM-PDK contains both the ADS8881EVM and the MMB0 motherboard; however, the devices may be shipped unconnected or configured incorrectly. Follow these steps to verify that ADS8881EVM-PDK kit is properly configured and connected. Step 1. Unpack the ADS8880EVM-PDK kit. Step 2. Set the J12 to closed, J13A to open, and J13B to closed on the MMB0 as shown in Figure 7. Figure 7.
PDK Kit Operation www.ti.com 6.4 Powering up the ADS8881EVM-PDK. Once the ADS8881EVM-PDK kit is configured, power can be applied to the MMB0. This power comes from a wall supply that delivers 6 VDC to the MMB0 through J2 on the MMB0 motherboard. This wall power supply is included with the PDK. After the power supply is connected, four green light emitting diodes (LEDs) in the bottom right-hand corner of the MMB0 motherboard should light up.
PDK Kit Operation www.ti.com Figure 10. ADS8881EVM Plug-in: Device Configuration Tab The device configuration tab contains the following controls. Data Rate— By default, it is 1 MSPS. This control shows the data rate or sampling frequency used by the ADC to acquire data. With SCLK frequency of 80 MHz, it can be set to be values between 19.536KSPS to 1-MSPS. With SCLK frequency of 10-MHz, it can be set to a value between 4 KSPS to 344.827-KSPS. SCLK— By default, it is 80 MHz.
PDK Kit Operation www.ti.com 7.4 Loading Test Plug-in Once the ADS8881EVM plug-in is configured, one of the four test plug-ins must be loaded to acquire data. Using the drop-down Test menu, as shown in Figure 11. Note that only one Test plug-in can be loaded at a time. If a different plug-in is selected, the previous plug-in is unloaded. Figure 11.
Bill of Materials, Schematics, and Layout 8 www.ti.com Bill of Materials, Schematics, and Layout Schematics for the ADS8881EVM are appended to this user's guide. The bill of materials is provided in Table 5. Section 8.2 shows the PCB layouts for the ADS8881EVM. 8.1 Bill of Materials NOTE: All components should be compliant with the European Union Restriction on Use of Hazardous Substances (RoHS) Directive. Some part numbers may be either leaded or RoHS.
Bill of Materials, Schematics, and Layout www.ti.com Table 5. ADS8881EVM Bill of Materials (continued) Item No. Qty Value 26 1 — Ref Des U3 IC OPAMP CHOP R-R 350KHZ SOT23-5 Description Texas Instruments OPA333AIDBV 27 1 — U4 IC OPAMP VFB R-R 95MHZ SOT23-5 Texas Instruments THS4281DBV 28 1 — U5 IC OPAMP GP R-R CMOS SOT23-5 Texas Instruments OPA330AIDBV 29 1 — U6 IC REG LDO 3.3V .
Bill of Materials, Schematics, and Layout 8.2 www.ti.com Board Layouts Figure 12 through Figure 15 show the PCB layouts for the ADS8881EVM. NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid out; they are not intended to be used for manufacturing ADS8881EVM PCBs. Figure 12. ADS8881EVM PCB: Top Layer Figure 13.
Bill of Materials, Schematics, and Layout www.ti.com Figure 14. ADS8881EVM PCB: Power Layer Figure 15.
Bill of Materials, Schematics, and Layout 8.3 Schematic 18 ADS8881EVM-PDK www.ti.
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of EVMs for RF Products in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
