Datasheet

t
su(CS-SCLK)
t
d(CS-DO)
1R 1F
2 3 4 5 12 13 14 15 16R 16F
CS
SCLK
DOUT
DIN
Acquisition
(Internal)
t
h(SCLK-DOUT)
t
w(SCLK_H)
t
w(SCLK_L)
t
d(CS-DOHZ)
t
su(DIN-SCLK)
t
h(SCLK-DIN)
1/f
SAMPLE
t
c
t
(ACQ)
t
d(SCLK-DOUT)
ADS8634
ADS8638
SBAS541A –MAY 2011– REVISED AUGUST 2011 www.ti.com
PARAMETER MEASUREMENT INFORMATION
TIMING DIAGRAM
Table 1. Timing Requirements
(1)(2)(3)
ADS8634, ADS8638
TEST
PARAMETER CONDITIONS MIN TYP MAX UNIT
DVDD = 1.8V 15 SCLK
t
c
Conversion time DVDD = 3V 15 SCLK
DVDD = 5V 15 SCLK
DVDD = 1.8V 250 ns
t
(ACQ)
Acquisition time DVDD = 3V 250 ns
DVDD = 5V 250 ns
DVDD = 1.8V 52.5 ns
t
d(CS-DO)
Delay time, CS low to first data (D0 to D15) out DVDD = 3V 40.0 ns
DVDD = 5V 30.5 ns
DVDD = 1.8V 26.0 ns
t
su(CS-SCLK)
Setup time, CS low to first SCLK rising edge DVDD = 3V 18.5 ns
DVDD = 5V 15.5 ns
DVDD = 1.8V 51.5 ns
t
d(SCLK-DOUT)
Delay time, SCLK falling to DOUT DVDD = 3V 33.0 ns
DVDD = 5V 25.3 ns
DVDD = 1.8V 5.5 ns
t
h(SCLK-DOUT)
Hold time, SCLK falling to DOUT valid DVDD = 3V 5.0 ns
DVDD = 5V 4.7 ns
DVDD = 1.8V 7.3 31.0 ns
t
d(CS-DOHZ)
Delay time CS high to DOUT high-z DVDD = 3V 6.4 22.0 ns
DVDD = 5V 5.9 16.4 ns
(1) All specifications at –40°C to +125°C, unless otherwise noted.
(2) 1.8V specifications apply from 1.65V to 1.95V; 3V specifications apply from 2.7V to 3.6V; and 5V specifications apply from 4.75V to
5.25V.
(3) With 20pF load on DOUT.
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Product Folder Link(s): ADS8634 ADS8638