Datasheet

ADS8634
ADS8638
SBAS541A –MAY 2011– REVISED AUGUST 2011 www.ti.com
Ch0-1 Tripped-Flag to Ch2-3 Active-Flag: Alarm Flags Register for Channels 0 to 3
(Address = 21h to 24h; Page 0)
ADDRESS ON
REGISTER PAGE 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Tripped Tripped Tripped Tripped
Alarm Alarm Alarm Alarm
Ch0-1 Tripped-Flag 21h X
(1)
X X X
Flag Ch0 Flag Ch0 Flag Ch1 Flag Ch1
Low High Low High
Active Active Active Active
Alarm Alarm Alarm Alarm
Ch0-1 Active-Flag 22h X X X X
Flag Ch0 Flag Ch0 Flag Ch1 Flag Ch1
Low High Low High
Tripped Tripped Tripped Tripped
Alarm Alarm Alarm Alarm
Ch2-3 Tripped-Flag 23h X X X X
Flag Ch2 Flag Ch2 Flag Ch3 Flag Ch3
Low High Low High
Active Active Active Active
Alarm Alarm Alarm Alarm
Ch2-3 Active-Flag 24h X X X X
Flag Ch2 Flag Ch2 Flag Ch3 Flag Ch3
Low High Low High
(1) X = don't care.
There are two alarm thresholds (High and Low) per channel and for each threshold there are two flags. An active
alarm flag is enabled when an alarm is triggered (when data cross the alarm threshold) and remains enabled as
long as the alarm condition persists. A tripped alarm flag is enabled in the same manner as an active alarm flag,
but it remains latched until it is read. Registers addressed 21h to 24h on page 0 store active and tripped alarm
flags for all four channels.
Bits[7:6] Active/Tripped Alarm Flag Chn High/Low
Each individual bit indicates an active/tripped, high/low alarm flag for each channel, as per the Ch0-1 Tripped-Flag
to Ch2-3 Active-Flag register.
0 = No alarm detected
1 = Alarm detected
Bits[5:4] Don't care (1 or 0), these bits do not have any function assigned
Bits[3:2] Active/Tripped Alarm Flag Chn High/Low
Each individual bit indicates an active/tripped, high/low alarm flag for each channel, as per the Ch0-1 Tripped-Flag
to Ch2-3 Active-Flag register.
0 = No alarm detected
1 = Alarm detected
Bits[1:0] Don't care (1 or 0), these bits do not have any function assigned
Page Selection Register for the ADS8634
The registers are arranged on two pages: page 0 and page 1. The page register selects the register page.
Page: Page Selection Register (Address = 7Fh; Page 0)
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 Page Addr
Bits[7:1] Must always be set to '0'
Bit 0 Page Addr
This bit selects the page address.
0 = Selects page 0 for the next register read or write command; all register read/write operations after this are
performed on the page 0 registers until page 1 is selected
1 = Selects page 1 for the next register read or write command; all register read/write operations after this are
performed on the page 1 registers until page 0 is selected
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