Datasheet

ADS8634
ADS8638
SBAS541A –MAY 2011– REVISED AUGUST 2011 www.ti.com
Ch0-3 Tripped-Flag to Ch4-7 Active-Flag: Alarm Flags Register for Channels 0 to 7
(Address = 21h to 24h; Page 0)
ADDRESS
REGISTER ON PAGE 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Ch0-3 Tripped Tripped Tripped Tripped Tripped Tripped Tripped Tripped
Tripped- 21h Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag
Flag Ch0 Low Ch0 High Ch1 Low Ch1 High Ch2 Low Ch2 High Ch3 Low Ch3 High
Active Active Active Active Active Active Active Active
Ch0-3
22h Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag
Active-Flag
Ch0 Low Ch0 High Ch1 Low Ch1 High Ch2 Low Ch2 High Ch3 Low Ch3 High
Ch4-7 Tripped Tripped Tripped Tripped Tripped Tripped Tripped Tripped
Tripped- 23h Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag
Flag Ch4 Low Ch4 High Ch5 Low Ch5 High Ch6 Low Ch6 High Ch7 Low Ch7 High
Active Active Active Active Active Active Active Active
Ch4-7
24h Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag Alarm Flag
Active-Flag
Ch4 Low Ch4 High Ch5 Low Ch5 High Ch6 Low Ch6 High Ch7 Low Ch7 High
There are two alarm thresholds (high and low) per channel, with two flags for each threshold. An active alarm
flag is enabled when an alarm is triggered (when data cross the alarm threshold) and remains enabled as long
as the alarm condition persists. A tripped alarm flag is enabled in the same manner as an active alarm flag, but it
remains latched until it is read. Registers 21h to 24h on page 0 store the active and tripped alarm flags for all
eight channels.
Bits[7:0] Active/Tripped Alarm Flag Chn High/Low
Each individual bit indicates an active/tripped, high/low alarm flag status for each channel, as per the Alarm Flags
Register for channels 0 to 7.
0 = No alarm detected
1 = Alarm detected
Page Selection Register for the ADS8638
The registers are arranged on two pages: page 0 and page 1. The page register selects the register page.
Page: Page Selection Register (Address = 7Fh; Page 0)
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 Page Addr
Bits[7:1] Must always be set to '0'
Bit 0 Page Addr
This bit selects the page address.
0 = Selects page 0 for the next register read or write command; all register read/write operations after this are
performed on the page 0 registers until page 1 is selected
1 = Selects page 1 for the next register read or write command; all register read/write operations after this are
performed on the page 1 registers until page 0 is selected
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