Datasheet

161 2 1 2 16
Power-Down
Active
Invalid Data
Invalid Data
Invalid Data
CS
SCLK
Power-Down State
(Internal)
DOUT
Power-Up Delay
1 2 16
Valid Data
1 2 16
Valid Data
T
d(PWRUP)
AL_PD
Programmed as PD
1 2 15 16
Power-Down Command
Active
CS
SCLK
DIN
Power-Down State
(Internal)
Valid DataDOUT
Power-Down
ADS8634
ADS8638
SBAS541A –MAY 2011– REVISED AUGUST 2011 www.ti.com
A high level on AL_PD acts as a power-up request and the power-up sequence begins on the next CS falling
edge. The device is active after t
d(PWRUP)
. The first valid acquisition initiates in the first data frame (with a CS
falling edge) after a power-up delay. The first valid data are presented in the second data frame after the device
attains an active state, as shown in Figure 82.
Figure 82. Power-Up Via the AL_PD Pin
The power-down/up operation can also be controlled with register settings. See the Channel Sequencing Control
Registers for the ADS8638 and Channel Sequencing Control Registers for the ADS8634 sections for details.
Figure 83 illustrates power-down and power-up commands for quick reference.
Figure 83. Power-Down Via Register Write
After receiving a valid power-down command, the device enters a power-down state on 16th SCLK falling edge.
An example of this command is given in Table 6.
Table 6. Power-Down Command Example
RD/
REGISTER ADDRESS WR DATA
PIN Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
DIN 0 0 0 0 1 0 X 0 0 X X X 1 1 1 X
Auto/manual sequence W 0 X X X Power-down X
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