ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com 12-Bit, 1MSPS, 4-/8-Channel, Bipolar-Input, SAR Analog-to-Digital Converter with Software-Selectable Ranges Check for Samples: ADS8634, ADS8638 FEATURES DESCRIPTION • The ADS8634 and ADS8638 (ADS8634/8) are 12-bit analog-to-digital converters (ADCs) capable of measuring inputs up to ±10V at 1MSPS. Using a successive approximation register (SAR) core, these ADCs provide a sample-and-hold front-end with no latency in conversions.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS: ADS8634, ADS8638 Minimum/maximum specifications at TA = –40°C to +125°C, fSAMPLE = 1MSPS, HVDD = 10V to 15V, HVSS = –10V to –15V, AVDD = 4.75V to 5.25V, DVDD = 2.7V to 3.6V, and VREF = 2.5V, unless otherwise noted. Typical specifications at +25°C, fSAMPLE = 1MHz, HVDD = 10V, HVSS = –10V, AVDD = 3.3V, DVDD = 3.3V, and VREF = 2.5V, unless otherwise noted.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS: ADS8634, ADS8638 (continued) Minimum/maximum specifications at TA = –40°C to +125°C, fSAMPLE = 1MSPS, HVDD = 10V to 15V, HVSS = –10V to –15V, AVDD = 4.75V to 5.25V, DVDD = 2.7V to 3.6V, and VREF = 2.5V, unless otherwise noted. Typical specifications at +25°C, fSAMPLE = 1MHz, HVDD = 10V, HVSS = –10V, AVDD = 3.3V, DVDD = 3.3V, and VREF = 2.5V, unless otherwise noted.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS: ADS8634, ADS8638 (continued) Minimum/maximum specifications at TA = –40°C to +125°C, fSAMPLE = 1MSPS, HVDD = 10V to 15V, HVSS = –10V to –15V, AVDD = 4.75V to 5.25V, DVDD = 2.7V to 3.6V, and VREF = 2.5V, unless otherwise noted. Typical specifications at +25°C, fSAMPLE = 1MHz, HVDD = 10V, HVSS = –10V, AVDD = 3.3V, DVDD = 3.3V, and VREF = 2.5V, unless otherwise noted.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION TIMING DIAGRAM 1/fSAMPLE tsu(CS-SCLK) CS 1R 1F 2 3 4 5 12 13 14 15 16R 16F SCLK th(SCLK-DOUT) tw(SCLK_H) td(SCLK-DOUT) td(CS-DO) tw(SCLK_L) td(CS-DOHZ) DOUT tsu(DIN-SCLK) th(SCLK-DIN) DIN Acquisition (Internal) t(ACQ) tc Table 1.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Table 1. Timing Requirements(1)(2)(3) (continued) PARAMETER tsu(DIN-SCLK) th(SCLK-DIN) tW(SCLK_H) tW(SCLK_L) fSCLK Setup time, DIN valid to SCLK rising edge Hold time, SCLK rising to DIN valid Pulse duration, SCLK high Pulse duration, SCLK low SCLK frequency ADS8634, ADS8638 TEST CONDITIONS MIN DVDD = 1.8V 7.0 ns DVDD = 3V 6.0 ns TYP MAX DVDD = 5V 5.0 ns DVDD = 1.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PIN CONFIGURATIONS REF REFGND AL_PD DVDD DGND DOUT 24 23 22 21 20 19 RGE PACKAGE 4mm × 4mm QFN-24 (TOP VIEW) AVDD 1 18 DIN AGND 2 17 SCLK AGND 3 16 CS NC 4 15 HVSS AINGND 5 14 HVDD NC 6 13 NC 7 8 9 10 11 12 NC AIN3 AIN2 AIN1 AIN0 NC Thermal Pad (Bottom Side) Figure 1.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com REF REFGND AL_PD DVDD DGND DOUT 24 23 22 21 20 19 RGE PACKAGE 4mm × 4mm QFN-24 (TOP VIEW) AVDD 1 18 DIN AGND 2 17 SCLK AGND 3 16 CS NC 4 15 HVSS AINGND 5 14 HVDD AIN7 6 13 AIN0 7 8 9 10 11 12 AIN6 AIN5 AIN4 AIN3 AIN2 AIN1 Thermal Pad (Bottom Side) Figure 2.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. DNL vs SIGNAL RANGE Differential Nonlinearity (LSB) Differential Nonlinearity (LSB) DNL vs ANALOG SUPPLY VOLTAGE 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 −1 2.7 Maximum DNL Minimum DNL 3.2 3.7 4.2 AVDD (V) 4.7 5.2 5.7 1.6 1.4 1.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. INL vs ANALOG SUPPLY VOLTAGE INL vs SIGNAL RANGE 1.5 1.5 1.2 Maximum INL Integral Nonlinearity (LSB) Integral Nonlinearity (LSB) 1.2 0.9 0.6 0.3 0 Minimum INL −0.3 −0.6 −0.9 −1.2 Maximum INL 0.9 0.6 0.3 0 Minimum INL −0.3 −0.6 −0.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. OFFSET ERROR vs ANALOG SUPPLY VOLTAGE OFFSET ERROR vs SIGNAL RANGE 2.5 2 2 1.5 1.5 Offset Error (LSB) Offset Error (LSB) 2.5 1 0.5 0 −0.5 −1 −1.5 1 0.5 0 −0.5 −1 −1.5 −2 −2 −2.5 2.7 3.2 3.7 4.2 AVDD (V) 4.7 5.2 −2.5 ±2.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. GAIN ERROR vs SIGNAL RANGE 8 6 6 4 4 Gain Error (LSB) Gain Error (LSB) GAIN ERROR vs ANALOG SUPPLY VOLTAGE 8 2 0 −2 2 0 −2 −4 −4 −6 −6 −8 2.7 3.2 3.7 4.2 AVDD (V) 4.7 5.2 −8 ±2.5V 5.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. SNR vs SIGNAL RANGE 72 71.8 71.8 Signal-to-Noise Ratio (dB) Signal-to-Noise Ratio (dB) SNR vs ANALOG SUPPLY VOLTAGE 72 71.6 71.4 71.2 71 70.8 70.6 70.4 70.2 71.6 71.4 71.2 71 70.8 70.6 70.4 70.2 70 2.7 3.2 3.7 4.2 AVDD (V) 4.7 5.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. SNR vs INPUT FREQUENCY SINAD vs ANALOG SUPPLY VOLTAGE 72 Signal-to-Noise and Distortion (dB) 72 Signal-to-Noise Ratio (dB) 71.8 71.6 71.4 71.2 71 70.8 70.6 70.4 70.2 70 0 15 30 45 60 75 fIN, Input Frequency (kHz) 90 71.8 71.6 71.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. SINAD vs POSITIVE HIGH-VOLTAGE SUPPLY SINAD vs INPUT FREQUENCY 72 Signal-to-Noise and Distortion (dB) Signal-to-Noise and Distortion (dB) 72 71.5 71 70.5 70 69.5 69 68.5 68 2.5 5 7.5 10 12.5 HVDD, Positive High-Voltage Supply (V) 71.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. SFDR vs CHANNEL NUMBER SFDR vs FREE-AIR TEMPERATURE 88 Spurious-Free Dynamic Range (dB) Spurious-Free Dynamic Range (dB) 88 87.5 87 86.5 86 85.5 85 84.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. ANALOG SUPPLY CURRENT (Dynamic) vs FREE-AIR TEMPERATURE ANALOG SUPPLY CURRENT (Dynamic) vs SAMPLE RATE 3.5 2.4 AVDD Dynamic Current (mA) AVDD Dynamic Current (mA) HVDD = 15V HVSS = −15V 2.35 2.3 2.25 2.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. POSITIVE HIGH-VOLTAGE SUPPLY CURRENT (Dynamic) vs SAMPLE RATE NEGATIVE HIGH-VOLTAGE SUPPLY CURRENT (Dynamic) vs ANALOG SUPPLY VOLTAGE −0.2 HVDD = 15V HVSS = −15V HVSS Dynamic Current (mA) HVDD Dynamic Current (mA) 0.5 0.4 0.3 0.2 0.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, internal reference = 2.5V, channel 0, range = ±2.5V, AVDD = 2.7V, DVDD = 1.8V, HVDD = 10V, HVSS = –10V, and fSAMPLE = 1MSPS, unless otherwise noted. INL SPECTRAL RESPONSE 1.5 0.9 0.6 Amplitude (dB) Integral Nonlinearity (LSB) 1.2 0.3 0 −0.3 −0.6 −0.9 −1.2 −1.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com OVERVIEW The ADS8634 and ADS8638 are 12-bit, 4- and 8-channel devices, respectively. The ADS8634/8 feature software-selectable bipolar and unipolar ranges, an internal reference with an option to use an external reference, and an internal temperature sensor. Independent power-down control for the internal reference and temperature sensor blocks allows for optimal power based on application.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Figure 72 shows electrostatic discharge (ESD) diodes connected to the HVDD and HVSS supplies. Make sure these diodes do not turn on by keeping the analog inputs within the specified range. HVDD AIN0 HVSS HVDD Temperature Sensor AIN1 HVSS SAR ADC HVDD AIN3/7 HVSS HVDD AINGND HVSS Figure 72.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com The ADS8634/8 sample the voltage difference (VAINx – VAINGND) between the selected analog input channel and the AINGND pin. The ADS8634/8 allow a ±0.2V range on AINGND. This feature is useful in modular systems where the sensor/signal conditioning block is removed from the ADC and when there could be a difference in the ground potential of the sensor/signal condioner from the ADC ground.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com These devices allow the use of an external reference in the range of 2.0V to 3.0V. The nominal input ranges ±10V, ±5V, ±2.5V, 0V to 5V, and 0V to 10V assume a 2.5V reference; a different reference voltage scales the full-scale ranges proportionately. For example, if a 3.0V reference is used and the ±10V range is selected, the actual input range is scaled by (3.0/2.5) for a full-scale range of ±12V.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Values of mREF and CREF for any reference voltage other than 2.5V can be calculated using Equation 3 and Equation 4: mREF = mREF_2.5 × 2.5/VREF CREF = (CREF_2.5 – 3584) × 2.5/VREF + 3584 (3) (4) For example, at a 2V reference: mREF_2 = 0.47 × 2.5/2 = 0.59 and CREF_2 = (3777.2 – 3584) × 2.5/2 + 3584 = 3825.5 For the reference voltage used, Equation 2 can be rewritted using mREF and CREF as calculated in Equation 3 and Equation 4.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com ADC Code FFFh 800h 001h Negative FSR + 1LSB Positive FSR 1LSB 0 Analog Input (AINx AINGND) Figure 76. Transfer Function for Bipolar Signal Ranges ADC Code FFFh 800h 001h 1LSB FSR/2 Analog Input (AINx FSR – 1LSB AINGND) Figure 77.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com AL_PD: USER-CONFIGURABLE PIN The ADS8634/8 feature a user-configurable AL_PD pin. This pin can either be configured as an alarm output (AL) or as a power-down control pin (PD). Refer to the Page 0, Register Descriptions for the ADS8638 and Page 0, Register Descriptions for the ADS8634 sections for details. When programmed as an alarm output, an active-high alarm is flagged on this pin if there is a high or low alarm on any channel.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com All Channel H/L Alarms Figure 80 shows a functional block diagram for a single-channel alarm. For each high and low alarm there are two flags: Active Alarm Flag and Tripped Alarm Flag; refer to the Alarm Flags for the ADS8638 (Read-Only) and Alarm Flags for the ADS8634 (Read-Only) sections for more details.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com A high level on AL_PD acts as a power-up request and the power-up sequence begins on the next CS falling edge. The device is active after td(PWRUP). The first valid acquisition initiates in the first data frame (with a CS falling edge) after a power-up delay. The first valid data are presented in the second data frame after the device attains an active state, as shown in Figure 82.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com The serial interface is active even during a device power-down state. Commands can be issued via the DIN pin during a power-down state. A power-up command (through DIN) is acknowledged on the next CS falling edge and a power-up sequence initiates. An example of this command is given in Table 7.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com DEVICE OPERATION The ADS8634/8 are 12-bit, 4-/8-channel devices. Each frame begins with a CS falling edge. The ADS8634/8 sample the input signal from the selected channel on the CS falling edge and initiate conversion. SCLK is used for conversion and data are output on the DOUT line while conversion is in process. The 16-bit data word contains a 4-bit channel address followed by the 12-bit conversion result in MSB-first format.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com CHANNEL SEQUENCING MODES The ADS8634/8 offer two channel sequencing modes: auto and manual. In auto-scan mode, the channel number automatically increments every frame. In manual mode, the channel is selected for every frame of a register write. The analog inputs can be selected for an automatic scan with a register setting. The device automatically scans only the selected analog inputs in ascending order.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com DEVICE TEMPARATURE READ The ADS8634/8 feature an internal temperature sensor. The device temperature can be read at any time during any scan. It is essential to enable (power-up) the internal temperature at least one cycle before selecting the temperature sensor for the device temperature measurement. The temperature sensor must be deselected after temperature measurement.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com DOUT DATA FORMAT The device outputs 16-bit data in every cycle. Table 8 shows the DOUT data format. Table 8.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com DIN DATA FORMAT (SPI COMMAND WORD) Device registers can be written to and read from. There must be a minimum of 16 SCLKs after the CS falling edge for any read or write operation. The device receives the command (as shown in Table 9 and Table 10) through DIN where the first seven bits (bits[15:9]) represent the register address and the eighth bit (bit 8) is the read/write instruction.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com SPI REGISTER WRITE CYCLE Figure 89 shows a timing diagram of the SPI write cycle. The device executes the command on the first CS falling edge after a command write cycle. The only exception to this command execution timing is the power-down command. The power-down command (through a register write) is executed on the 16th falling edge of SCLK. This falling edge occurs immediately after the last command bit is written to the device.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com REGISTER MAP: ADS8638 The ADS8638 internal registers are mapped in two pages: page 0 and page 1. Page 0 is selected by default at power-up and after reset. Any register read/write operation performed while on page 0 addresses the page 0 registers. Writing 01h to register address 7Fh selects page 1 for any further register operations.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Table 12.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PAGE 0 REGISTER DESCRIPTIONS: ADS8638 This section provides bit-by-bit descriptions of each page 0 register. Channel Sequencing Control Registers for the ADS8638 There are two modes for channel sequencing: auto and manual mode. In auto-scan mode, the device automatically scans the preselected channels in sequential order with a new channel selected for every conversion.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Auto: Auto-Scan Mode Register (Address = 05h; Page 0) 7 Reset-Seq 6 0 5 4 0 0 3 2 1 Range Select[2:0] 0 Sel Temp Sensor This register selects device operation in auto-scan mode, allows the preselected signal range to be temporarily overriden for the next conversion, and enables the device temperature to be read. Bit 7 Reset-Seq This bit resets the auto-mode sequence counter.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Continued Operation in the Selected Mode for the ADS8638 Holding the DIN line low continuously (equivalent to writing '0' to all 16 bits) during device operation as per Figure 85, continues device operation in the last selected mode (auto or manual). The device follows the range selection from the configuration registers (address 10h to 13h).
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Auto-Md Ch-Sel: Channel Selection Register for Auto-Scan Mode (Address = 0Ch; Page 0) 7 6 5 4 3 2 1 0 Sel Ch0 Sel Ch1 Sel Ch2 Sel Ch3 Sel Ch4 Sel Ch5 Sel Ch6 Sel Ch7 This register selects the channels for the auto-mode sequence. The device scans only the selected channels in ascending order during auto-scan mode, starting with the lowest channel selected.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Alarm Flag Registers for the ADS8638 (Read-Only) The alarm conditions related to individual channels are stored in these registers. The flags can be read when an alarm interrupt is received on the AL_PD pin. There are two types of flag for every alarm: active and tripped. The active flag is set to '1' under the alarm condition (when data cross the alarm limit) and remains so as long as the alarm condition persists.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PAGE 1 REGISTER DESCRIPTIONS: ADS8638 This section provides bit-by-bit descriptions of each page 1 register. As described earlier, the device registers are mapped to two pages. Page 0 is selected by default at power-up and after reset. Page 1 can be selected by writing 01h to register address 7Fh. After selecting page 1, any register read/write action addresses the page 1 registers.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com CHANNEL N HA/LA MSB REGISTER Bits[7:4] Chn-HA/LA Hysteresis[3:0] These bits set the channel n high/low alarm hysteresis. For example, bits[7:4] of the channel 6 HA MSB register (address 1Eh, page 1) set the channel 6 high alarm hysteresis.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com REGISTER MAP: ADS8634 The ADS8634 internal registers are mapped in two pages: page 0 and page 1. Page 0 is selected by default at power-up and after reset. Any register read/write action while on page 0 addresses the page 0 registers. Writing 01h to register address 7Fh selects page 1 for any further register operations.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Table 14.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PAGE 0 REGISTER DESCRIPTIONS (ADS8634) This section provides bit-by-bit descriptions of each page 0 register. As described earlier, the device registers are mapped to two pages: page 0 and page 1. Page 0 is selected by default at power-up and after reset. Any register read/write action while on page 0 addresses the page 0 registers. Writing 01h to register address 7Fh selects page 1 for any further register operations.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Auto: Auto-Scan Mode Register (Address = 05h; Page 0) 7 Reset-Seq 6 0 5 4 0 0 3 2 1 Range Select[2:0] 0 Sel Temp Sensor This register selects device operation in auto-scan mode, allows the preselected signal range for the next conversion to be temporarily overriden, and enables the device temperature to be read. Bit 7 Reset-Seq This bit resets the auto-mode sequence counter.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Continued Operation in the Selected Mode for the ADS8634 Holding the DIN line low continuously (equivalent to writing '0' to all 16 bits) during device operation as per Figure 85 continues device operation in the last selected mode (auto or manual). The device follows range selection through the configuration registers (address 10h to 13h).
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Auto-Md Ch-Sel: Channel Selection Registers for Auto-Scan Mode (Address = 0Ch; Page 0) (1) 7 6 5 4 3 2 1 0 Sel Ch0 X (1) Sel Ch1 X Sel Ch2 X Sel Ch3 X X = don't care. This register selects channels for the auto-mode sequence. The device scans only the selected channels in ascending order during auto-scan mode, starting with the lowest channel selected.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Ch0 Range to Ch3 Range: Range Selection Registers for Channels 0 to 3 (Address = 10h to 13h; Page 0) REGISTER Ch0 Range Ch1 Range Ch2 Range Ch3 Range (1) ADDRESS ON PAGE 0 10h 11h 12h 13h Bit 7 0 0 0 0 Bit 6 Range Range Range Range Bit 5 Bit 4 Select Ch0[2:0] Select Ch1[2:0] Select Ch2[2:0] Select Ch3[2:0] Bit 3 0 0 0 0 Bit 2 X (1) X X X Bit 1 X X X X Bit 0 X X X X X = don't care.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com Alarm Flag Registers for the ADS8634 (Read-Only) The alarm conditions related to individual channels are stored in these registers. When an alarm interrupt is received, the flags can be read on the AL_PD pin. There are two types of flag for every alarm: active and tripped. An active alarm flag is enabled when an alarm is triggered (when data cross the alarm threshold) and remains enabled as long as the alarm condition persists.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PAGE 1 REGISTER DESCRIPTIONS (ADS8634) This section provides bit-by-bit descriptions of each page 1 register. As described earlier, the device registers are mapped to two pages: page 0 and page 1. Page 0 is selected by default at power-up and after reset. Page 1 can be selected by writing 01h to register address 7Fh. After selecting page 1, any register read/write action addresses page 1 registers after a page 1 selection.
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ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com APPLICATION INFORMATION DRIVING ANALOG SIGNAL INPUT The ADS8634/8 employ a sample-and-hold stage at the input. An 8pF sampling capacitor is connected during sampling. This configuration results in a glitch at the input terminals of the device at the start of the sample. The external circuit must be designed in such a way that the input can settle to the required accuracy during the chosen sampling time.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com POWER MANAGEMENT AT LOWER SPEEDS There are multiple data acquisition applications that require sampling speeds much lower than 1MSPS. The ADS8634/8 offer power saving while running at lower speeds. As shown in Figure 92, the ADS8634/8 consume dynamic power from a CS rising edge until the 16th SCLK falling edge. While using the ADS8634/8 at lower sampling speeds, it is recommended to use SCLK at the maximum specified frequency.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PROGRAMMING SEQUENCE A typical programming sequence for the ADS8634/8 is shown in Figure 93. Device Powers Up Starts in Manual Mode channel 0, ±10V input range.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com DRIVING ANALOG SIGNAL INPUT WITHOUT AN OPERATIONAL AMPLIFIER There are some low input signal bandwidth applications, such as general-purpose programmable logic controllers (PLCs) I/O, where it is not required to operate an ADC at high sampling rates and it is desirable to avoid using a dedicated driving op amp from a cost perspective.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com The source impedance (RSOURCE + R1) combined with (CBYPASS + CSAMPLE) acts as a low-pass filter with Equation 11: Filter Time Constant = (RSOURCE + R1) × (CBYPASS + CSAMPLE) Where: CSAMPLE is the internal sampling capacitance of the ADC (equal to 32pF). (11) Table 17 lists the recommended bypass capacitor values and the filter-time constant for different source resistances.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com PCB LAYOUT SCHEMATIC RECCOMENDATIONS ADCs are mixed-signal devices. For maximum performance, proper decoupling, grounding, and proper termination of digital signals is essential. Figure 95 and Figure 96 show the essential components around the ADC. All capacitors shown are ceramic. These decoupling capacitors must be placed close to the respective signal pins.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com There is a 50Ω source series termination resistor shown on the DOUT signal. This resistor must be placed as close to DOUT as possible. Series terminations for SCLK and CS must be placed close to the host. Analog Signal Common Common Analog/Digital Ground Plane C10 1 F Analog Supply 1 AVDD AGND 2 AGND 3 4 NC AINGND 0.
ADS8634 ADS8638 SBAS541A – MAY 2011 – REVISED AUGUST 2011 www.ti.com A common ground plane for both analog and digital often gives better results. Typically, the second printed circuit board (PCB) layer is the ground plane. The ADC ground pins are returned to the ground plane through multiple vias (PTH). It is a good practice to place analog components on one side and digital components on other side of the ADC (or ADCs).
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing ADS8634SRGER VQFN RGE 24 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS8634SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS8638SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8634SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS8634SRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS8638SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS8638SRGET VQFN RGE 24 250 210.0 185.0 35.
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