Datasheet

BUSY
(C20=C21=0)
FS
SDO_A
CHA0
FS
SDO_A
SDO_B
SEL_B=SEL_C/D=0
SEL_B=1,SEL_C/D=0
CHA1 CHC0 CHC1
CHB0 CHB1 CHD0 CHD1
CHA0 CHA1 CHB0 CHB1 CHC0 CHC1 CHD0 CHD1
64SCLKs
128SCLKs
ADS8528
ADS8548
ADS8568
www.ti.com SBAS543A –AUGUST 2011– REVISED OCTOBER 2011
Parallel Interface
To use the device with the parallel interface, the PAR/SER pin should be held low. The maximum achievable
data throughput rate is 650kSPS for the ADS8528, 600kSPS for the ADS8548, and 510kSPS for the ADS8568 in
this case.
Access to the ADS8528/48/68 is controlled as illustrated in Figure 2 and Figure 3.
Serial Interface
The serial interface mode is selected by setting the PAR/SER pin high. In this case, each data transfer starts with
the falling edge of the frame synchronization input (FS). The conversion results are presented on the serial data
output pins SDO_A (always active), SDO_B, SDO_C, and SDO_D, depending on the selections made using the
SEL_xx pins. Starting with the most significant bit (MSB), the output data are changed with the falling edge of
SCLK. Output data of the ADS8528 and ADS8548 maintain the LSB-aligned 16-bit format with leading bits
containing the extended sign (see also Table 7). Serial data input SDI are latched with the falling edge of SCLK.
The serial interface can be used with one, two, or four output ports. Port SDO_B can be enabled using pin 27
(SEL_B) while ports SDO_C and SDO_D are enabled using pin 28 (SEL_CD). If all four serial data output ports
are selected, the data can be read with either two 16-bit data transfers or with a single 32-bit data transfer. The
data of channels CH_x0 are available first, followed by data from channels CH_x1. The maximum achievable
data throughput rate is 480kSPS for the ADS8528, 450kSPS for the ADS8548, and 400kSPS for the ADS8568 in
this case.
If the application allows a data transfer using two ports only, the SDO_A and SDO_B outputs are used. The
device outputs data from channel CH_A0 followed by CH_A1, CH_C0, and CH_C1 on SDO_A, while data from
channel CH_B0 followed by CH_B1, CH_D0, and CH_D1 occur on SDO_B. In this case, a data transfer of four
16-bit words, two 32-bit words, or one continuous 64-bit word is supported. The maximum achievable data
throughput rate is 360kSPS for the ADS8528, 345kSPS for the ADS8548, and 315kSPS for the ADS8568 in this
case.
The output SDO_A is always active and exclusively used if only one serial data port is used in the application.
The data are available in the following order: CH_A0, CH_A1, CH_B0, CH_B1, CH_C0, CH_C1, CH_D0, and
CH_D1. Data can be read using eight 16-bit transfers, four 32-bit transfers, two 64-bit transfers, or a single
128-bit transfer. The maximum achievable data throughput rate is 235kSPS for the ADS8528, 230kSPS for the
ADS8548 and 215kSPS for the ADS8568 in this case. Figure 1 and Figure 39 show all possible scenarios in
more detail.
Figure 39. Data Output with One or Two Active SDOs (All Input Channels Active and Converted)
Copyright © 2011, Texas Instruments Incorporated 33
Product Folder Link(s): ADS8528 ADS8548 ADS8568