Datasheet

CONVST_x
BUSY
(C27=C26=0)
PAR =
SER=
RD
FS
INT
(C27=1,C26=0)
t
CONV
V =
REF
Range (Code+1)´
1024
ADS8528
ADS8548
ADS8568
SBAS543A –AUGUST 2011– REVISED OCTOBER 2011 www.ti.com
BUSY/INT
The BUSY signal indicates if a conversion is in progress. It goes high with a rising edge of any CONVST_x
signal and goes low when the output data of the last channel pair are available in the respective output register.
The readout of the data can be initiated immediately after the falling edge of BUSY.
In contrary, the INT signal goes high when a new conversion result has been loaded in the output register (this is
when the conversion has been completed) and remains high until the next read access, as shown in Figure 37.
The polarity of the BUSY/INT signal can be changed using CONFIG bit C26. The mode of pin 35 can be
controlled using CONFIG bit C27.
Figure 37. BUSY versus INT Behavior of Pin 35
Reference
The ADS8528/48/68 provides an internal, low-drift, 2.5V reference source. To increase the input voltage range,
the reference voltage can be switched to 3V mode using the VREF bit (CONFIG bit C13). The reference feeds a
10-bit string-DAC controlled by bits REFDAC[9:0] in the Configuration (CONFIG) Register. The buffered DAC
output is connected to the REFIO pin. In this way, the voltage at this pin is programmable in 2.44mV (2.92mV in
3V mode) steps and adjustable to the applications needs without additional external components. The actual
output voltage can be calculated using Equation 3:
(3)
where:
Range = the chosen maximum reference voltage output range (2.5V or 3V),
Code = the decimal value of the DAC register content.
Table 4 lists some examples of internal reference DAC settings with a reference range set to 2.5V. However, to
ensure proper performance, the DAC output voltage should not be programmed below 0.5V.
The buffered output of the DAC should be decoupled with a 100nF capacitor (minimum); for best performance, a
470nF capacitor is recommended. If the internal reference is placed into power-down (default), an external
reference voltage can drive the REFIO pin.
Table 4. DAC Settings Examples (2.5V Operation)
VREFOUT DECIMAL CODE BINARY CODE HEXADECIMAL CODE
0.5 V 204 00 1100 1100 CCh
1.25 V 511 01 1111 1111 1FFh
2.5 V 1023 11 1111 1111 3FFh
28 Copyright © 2011, Texas Instruments Incorporated
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