Datasheet
CS
DB[15:0]
WR
t
8
t
H4
t
9
t
S2
C
[31:16]
t
11
t
10
C
[15:0]
C
[31:24]
C
[23:16]
C
[15:8]
C
[7:0]
WordMode
(WORD/BYTE=0)
By dte Mo e
(WORD/BYTE=1)
Don’t
Care
ADS8556
ADS8557
ADS8558
SBAS404B –OCTOBER 2006– REVISED JANUARY 2012
www.ti.com
Figure 4. Parallel Write Access Timing Diagram
Parallel Interface Timing Requirements (Write Access)
(1)
Over recommended operating free-air temperature range at –40°C to +125°C, AVDD = 5V, and BVDD = 2.7V to 5.5V, unless
otherwise noted.
ADS8556, ADS8557, ADS8558
PARAMETER MIN TYP MAX UNIT
t
8
CS low to WR low time 0 ns
t
9
WR low pulse width 15 ns
t
10
WR high pulse width 10 ns
t
11
WR high to CS high time 0 ns
t
S2
Output data to WR rising edge setup time 5 ns
t
H4
Data output to WR rising edge hold time 5 ns
(1) All input signals are specified with t
R
= t
F
= 1.5ns (10% to 90% of BVDD) and timed from a voltage level of (V
IL
+ V
IH
)/2.
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