Datasheet

1 2
t
su1
t
su1
CS
R/C
External
DATACLK
CS
Set Low, Discontinuous Ext DATACLK
t
su1
t
su1
R/C
CS
External
DATACLK
R/C
Set Low, Discontinuous Ext DATACLK
t
su2
t
su2
CS
R/C
t
su3
BUSY
External
DATACLK
CS
Set Low, Discontinuous Ext DATACLK
Setup Time, R/C
to CS
ADS8519
www.ti.com SLAS462D –JUNE 2007–REVISED SEPTEMBER 2010
TIMING REQUIREMENTS, T
A
= –40°C to +85°C
PARAMETER MIN TYP MAX UNIT
t
w1
Pulse duration, convert 40 ns
t
d1
Delay time, BUSY from R/C low 6 20 ns
t
w2
Pulse duration, BUSY low 2.2 ms
t
d2
Delay time, BUSY, after end of conversion 5 ns
t
d3
Delay time, aperture 5 ns
t
conv
Conversion time 2.2 ms
t
acq
Acquisition time 1.8 ms
t
conv
+ t
acq
Cycle time 4 ms
t
d4
Delay time, R/C Low to internal DATACLK output 270 ns
t
c1
Cycle time, internal DATACLK 110 ns
t
d5
Delay time, data valid to internal DATACLK high 15 35 ns
t
d6
Delay time, data valid after internal DATACLK low 20 35 ns
t
c2
Cycle time, external DATACLK 35 ns
t
w3
Pulse duration, external DATACLK high 15 ns
t
w4
Pulse duration, external DATACLK low 15 ns
t
su1
Setup time, R/C rise/fall to external DATACLK high 15 ns
t
su2
Setup time, R/C transition to CS transition 10 ns
t
d7
Delay time, SYNC, after external DATACLK high 3 35 ns
t
d8
Delay time, data valid from external DATACLK high 2 13 ns
t
d9
Delay time, CS rising edge to external DATACLK rising edge 10 ns
t
d10
Delay time, previous data available after CS, R/C low 2 ms
t
su3
Setup time, BUSY transition to first external DATACLK 5 ns
t
d11
Delay time, final external DATACLK to BUSY rising edge 1 ms
t
su4
Setup time, TAG valid 0 ns
t
h1
Hold time, TAG valid 2 ns
TIMING DIAGRAMS
Figure 1. Critical Timing
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