Datasheet

POWER-DOWN
PWRD
REFD
ADS8517
SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com
The ADS8517 has analog power-down and reference power-down capabilities via PWRD (pin 25) and REFD (pin
26), respectively. PWRD and REFD high powers down all analog circuitry, maintaining data from the previous
conversion in the internal registers, provided that the data have not already been shifted out through the serial
port. Typical power consumption in this mode is 50 µ W. Power recovery is typically 1 ms, using a 2.2- µ F
capacitor connected to CAP. Figure 42 shows power-down to power-up recovery time relative to the capacitor
value on CAP. With +5 V applied to V
DIG
, the digital circuitry of the ADS8517 remains active at all times,
regardless of PWRD and REFD states.
PWRD high powers down all of the analog circuitry except for the reference. Data from the previous conversion
are maintained in the internal registers and can still be read. With PWRD high, a convert command yields
meaningless data.
REFD high powers down the internal 2.5-V reference. All other analog circuitry, including the reference buffer, is
active. REFD should be high when using an external reference to minimize power consumption and the loading
effects on the external reference. See Figure 41 for the characteristic impedance of the reference buffer input for
both REFD high and low. The internal reference consumes approximately 5 mW.
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