Datasheet

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ADS8517

FEATURES APPLICATIONS

DESCRIPTION

SuccessiveApproximationRegister(SAR)

Comparator

CDAC

Ref

Buffer

BUF

ADC

REF

CAP

40kW20kW

2.5-V

InternalReference

6kW

Parallel

and

Serial

DataOut

and

Control

Clock

40kW

10kW

REFD

Parallel

Data

PWRD

BYTE

BUSY

R/C

SB/BTC

TAG

SDATA

DATACLK

EXT/INT

ADS8517

www.ti.com

................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009

16-Bit, 200-kSPS, Low-Power, Sampling ANALOG-TO-DIGITAL CONVERTER

with Internal Reference and Parallel/Serial Interface

• Portable Test Equipment

• 200-kHz Minimum Sampling Rate

• USB Data Acquisition Module

• 4-V, 5-V, and ± 10-V Input Ranges with

• Medical Equipment

High-Impedance Input

• Industrial Process Control

• ± 1.5 LSB Max INL

• Digital Signal Processing

• +1.5/ – 1 LSB Max/Min DNL, 16 Bits NMC

• Instrumentation

• ± 2-mV Max BPZ, ± 0.6 ppm/ ° C BPZ Drift

• ± 2-mV Max UPZ, ± 0.15 ppm/ ° C UPZ Drift

• 88.8-dB SINAD with 10-kHz Input

The ADS8517 is a complete low-power, single 5-V

• SPI™-Compatible Serial Output With

supply, 16-bit sampling analog-to-digital (A/D)

Daisy-Chain (TAG), SPI Master/Slave Feature

converter. It contains a complete, 16-bit,

• Full Parallel Interface

capacitor-based, successive approximation register

(SAR) A/D converter with sample-and-hold, clock,

• Binary Twos Complement or Straight Binary

reference, and data interface. The converter can be

Output Code Formats

configured for a variety of input ranges including

• Single 4.5-V to 5.5-V Analog Supply, 1.65-V to

± 10 V, 4 V, and 5 V. For most input ranges, the input

5.5-V Interface Supply

voltage can swing to 25 V or – 25 V without damage

to the device.

• Uses Internal 2.5-V or External Reference

• No External Precision Resistors Required

An SPI-compatible serial interface allows data to be

synchronized to an internal or external clock. A full

• Low Power Dissipation (ADC+REF+BUF):

parallel interface using the selectable BYTE pin is

– 47 mW Typ, 60 mW Max at 200 kSPS

also provided to allow the maximum system design

• 50- µ W Max Power-Down Mode

flexibility. The ADS8517 is specified at a 200-kHz

sampling rate over the industrial – 40 ° C to +85 ° C

• Pin-Compatible with 16-Bit ADS7807 and

temperature range.

ADS8507 , and 12-Bit ADS7806 and ADS8506

• SO-28 and TSSOP-28 Packages

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 SPI is a trademark of Motorola, Inc.

3 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (41 pages)

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ADS8517 AD S8 517 AD S8 517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 16-Bit, 200-kSPS, Low-Power, Sampling ANALOG-TO-DIGITAL CONVERTER with Internal Reference and Parallel/Serial Interface FEATURES APPLICATIONS • 200-kHz Minimum Sampling Rate • 4-V, 5-V, and ±10-V Input Ranges with High-Impedance Input • ±1.5 LSB Max INL • +1.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ELECTRICAL CHARACTERISTICS (continued) At TA = -40°C to +85°C, fS = 200 kHz, VDIG = VANA = 5 V, using internal reference (see Figure 39), unless otherwise noted.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = -40°C to +85°C, fS = 200 kHz, VDIG = VANA = 5 V, using internal reference (see Figure 39), unless otherwise noted. ADS8517IB (1) ADS8517I PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT 2.48 2.5 2.52 2.48 2.5 2.
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ADS8517 www.ti.com .................................................................................................................................................
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com PIN ASSIGNMENTS (continued) DATACLK 6 18 I/O Data clock. Either an input or an output, depending on the EXT/INT level. Output data are synchronized to this clock. If EXT/INT is low, DATACLK transmits 16 pulses after each conversion, and then remains low between conversions.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS At fS = 200 kHz, VDIG = VANA = 5 V, and using internal reference (see Figure 39), unless otherwise specified. POWER-SUPPLY CURRENT vs FREE-AIR TEMPERATURE INTERNAL REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 2.520 Internal Reference Voltage (V) Power-Supply Current (mA) 10.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) At fS = 200 kHz, VDIG = VANA = 5 V, and using internal reference (see Figure 39), unless otherwise specified. UNIPOLAR OFFSET ERROR vs FREE-AIR TEMPERATURE UNIPOLAR OFFSET ERROR vs FREE-AIR TEMPERATURE 0.2 0.2 Unipolar 4 V Range Unipolar 5 V Range 0.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS (continued) At fS = 200 kHz, VDIG = VANA = 5 V, and using internal reference (see Figure 39), unless otherwise specified.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) At fS = 200 kHz, VDIG = VANA = 5 V, and using internal reference (see Figure 39), unless otherwise specified.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS (continued) At fS = 200 kHz, VDIG = VANA = 5 V, and using internal reference (see Figure 39), unless otherwise specified.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com BASIC OPERATION PARALLEL OUTPUT Figure 28 shows a basic circuit for operating the ADS8517 with a ±10-V input range and parallel output. Taking R/C (pin 22) low for a minimum of 40 ns (5 µs max) initiates a conversion.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 SERIAL OUTPUT Figure 29 shows a basic circuit to operate the ADS8517 with a ±10-V input range and serial output.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com STARTING A CONVERSION The combination of CS (pin 23) and R/C (pin 22) held low for a minimum of 40 ns puts the sample-and-hold of the ADS8517 in the hold state and starts conversion N.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 READING DATA The ADS8517 outputs serial or parallel data in straight binary (SB) or binary twos complement data output format. If SB/BTC (pin 7) is high, the output is in SB format; if it is low, the output is in BTC format. Refer to Table 4 for the ideal output codes.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com Parallel Output (After a Conversion) After conversion N is completed and the output registers have been updated, BUSY (pin 24) goes high. Valid data from conversion N are available on D7-D0 (pin 9-13 and 15-17). BUSY going high can be used to latch the data.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 Parallel Output (During a Conversion) After conversion N has been initiated, valid data from conversion N–1 can be read and are valid up to 2.2 µs after the start of conversion N. Do not attempt to read data beyond 2.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com External Data Clock To use an external data clock, tie EXT/INT (pin 8) high. The external data clock is not and cannot be synchronized with the internal conversion clock; care must be taken to avoid corrupting the data.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 Table 6. Timing Requirements (TA = –40°C to +85°C) PARAMETER MIN TYP MAX 0.04 5 UNIT µs tw1 Pulse duration, convert td1 Delay time, BUSY from R/C low 20 85 ns tw2 Pulse duration, BUSY low 2.3 2.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.
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ADS8517 www.ti.com .................................................................................................................................................
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com TAG FEATURE The TAG feature allows data from multiple ADS8517 converters to be read on a single serial line. The converters are cascaded together using the DATA pins as outputs and the TAG pins as inputs, as illustrated in Figure 37.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ANALOG INPUTS The ADS8517 offers three analog input ranges, as shown in Table 1. The offset specification is factory-calibrated with internal resistors. The gain specification is factory-calibrated with 0.1%, 0.25-W external resistors, as shown in Figure 38 and Figure 39.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com Analog input pins R1IN and R2IN have ±25-V overvoltage protection. The input signal must be referenced to AGND1. This referencing minimizes ground-loop problems typical to analog designs. The analog input should be driven by a low-impedance source.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 REFERENCE The ADS8517 can operate with the internal 2.5 V reference or an external reference. An external reference connected to pin 5 (REF) bypasses the internal reference.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com POWER-DOWN The ADS8517 has analog power-down and reference power-down capabilities via PWRD (pin 25) and REFD (pin 26), respectively.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 LAYOUT POWER For host processors that are able to advantage of a lower interface supply voltage, the ADS8517 offers a wide range of voltages—from 5.5V to as low as 1.65V.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com APPLICATION INFORMATION TRANSITION NOISE Apply a dc input to the ADS8517 and initiate 1000 conversions. The digital output of the converter varies in output codes because of the internal noise of the ADS8517. This variance is true for all 16-bit SAR converters.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ADS8517 AS AN SPI MASTER DEVICE (INT/EXT TIED LOW) Figure 44 shows a simple interface between the ADS8517 and an SPI-equipped microcontroller or TMS320 series digital signal processor (DSP) when using the internal serial data clock.
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ADS8517 SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com ADS8517 AS AN SPI SLAVE DEVICE (INT/EXT TIED HIGH) Figure 45 shows another interface between the ADS8517 and an SPI-equipped microcontroller or DSP in which the host processor acts as an SPI master device.
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ADS8517 www.ti.com ................................................................................................................................................. SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (September 2008) to Revision A ...............................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 8-Jun-2009 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing ADS8517IBDWR SOIC ADS8517IBPWR ADS8517IDWR ADS8517IPWR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 18.67 3.1 16.0 32.0 Q1 DW 28 1000 330.0 32.4 TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.
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PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8517IBDWR SOIC DW 28 1000 367.0 367.0 55.0 ADS8517IBPWR TSSOP PW 28 2000 367.0 367.0 38.0 ADS8517IDWR SOIC DW 28 1000 367.0 367.0 55.0 ADS8517IPWR TSSOP PW 28 2000 367.0 367.0 38.
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