Datasheet

OPA 627
GND
GND
GND
GND
Pin1
Pin 7
−
Pin 2
+
Pin3
Pin4
Pin 6
−15V
+15 V
Vin
2.2 mF
100 nF
2 kW
22 pF
2 kW
22 pF
2.2 mF
2.2 mF
100 nF
2.2 mF
VIN
AGND1
REF
CAP
ADS8515
OPA 132
or
AGND2
DGND
GND
GND
ADS8515
www.ti.com SLAS460D –JUNE 2007–REVISED SEPTEMBER 2010
ADC RESET
The ADC reset function of the ADS8515 can be used to terminate the current conversion cycle. Bringing R/C low
for at least 40 ns while BUSY is low will initiate the ADC reset. To initiate a new conversion, R/C must return to
the high state and remain high long enough to acquire a new sample (see Table 3, t
c
) before going low to initiate
the next conversion sequence. In applications that do not monitor the BUSY signal, it is recommended that the
ADC reset function be implemented as part of a system initialization sequence.
INPUT RANGES
The ADS8515 offers a standard ±10-V input range. Figure 24 shows the necessary circuit connections for the
ADS8515 with and without hardware trim. Offset and full-scale error specifications are tested and specified with
the fixed resistors shown in Figure 25(b). Full-scale error includes offset and gain errors measured at both +FS
and –FS. Adjustments for offset and gain are described in the Calibration section of this data sheet.
The offset and gain are adjusted internally to allow external trimming with a single supply. The external resistors
compensate for this adjustment and can be left out if the offset and gain are corrected in software (refer to the
Calibration section).
The nominal input impedance of 6.35 kΩ results from the combination of the internal resistor network shown on
the front page of the product data sheet. The input resistor divider network provides inherent overvoltage
protection assured to at least ±25 V. The 1% resistors used for the external circuitry do not compromise the
accuracy or drift of the converter. They have little influence relative to the internal resistors, and tighter tolerances
are not required.
The input signal must be referenced to AGND1. This minimizes the ground loop problem typical to analog
designs. The analog signal should be driven by a low impedance source. A typical driving circuit using an
OPA627 or OPA132 is shown in Figure 24.
Figure 24. Typical Driving Circuit (±10 V, No Trim)
Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): ADS8515