Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 28

Successive Approximation Register and Control Logic

Clock

BUSY

Comparator

BYTE

R/C

CDAC

Buffer

REF

CAP

± 10 V Input

2 kΩ

25.67 kΩ

7 kΩ

Internal

+4.096 V Ref

4 kΩ

Output

Latches

and

Three

State

Drivers

Three

State

Parallel

Data

Bus

ADS8515

www.ti.com

SLAS460D –JUNE 2007–REVISED SEPTEMBER 2010

16-Bit 250-kSPS Sampling CMOS ANALOG-TO-DIGITAL CONVERTER

Check for Samples: ADS8515

FEATURES

DESCRIPTION

• Standard ±10-V Input Range

The ADS8515 is a complete 16-bit sampling

analog-to-digital (A/D) converter using state-of-the-art

• 90-dB Min SNR with 20-kHz Input

CMOS structures. It contains a complete 16-bit,

• ±2.0 LSB Max INL

capacitor-based, SAR A/D converter with sample and

• ±1 LSB Max DNL, 16 Bits, No Missing Code

hold (S/H), reference, clock, interface for

• 5-V Analog Supply, Flexible I/O Supply Voltage microprocessor use, and 3-state output drivers.

at 1.65 V to 5.25 V

The ADS8515 is specified at a 250-kHz sampling rate

• Pin-Compatible with ADS7805/10 (Low Speed),

over the full temperature range. Precision resistors

and 12-Bit ADS7804/8504

provide an industry standard ±10-V input range, while

the innovative design allows operation from a single

• Uses Internal or External Reference

+5-V supply, with power dissipation under 100 mW.

• Full Parallel Data Output

The ADS8515 is available in a 28-pin SSOP package

• 100-mW Typ Power Dissipation at 250 kSPS

and is fully specified for operation over the industrial

• 28-Pin SSOP Package

–40°C to 85°C temperature range.

APPLICATIONS

• Industrial Process Control

• Data Acquisition Systems

• Digital Signal Processing

• Medical Equipment

• Instrumentation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 16-Bit 250-kSPS Sampling CMOS ANALOG-TO-DIGITAL CONVERTER Check for Samples: ADS8515 FEATURES DESCRIPTION • • • • • The ADS8515 is a complete 16-bit sampling analog-to-digital (A/D) converter using state-of-the-art CMOS structures. It contains a complete 16-bit, capacitor-based, SAR A/D converter with sample and hold (S/H), reference, clock, interface for microprocessor use, and 3-state output drivers.
PAGE 2
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 ELECTRICAL CHARACTERISTICS At TA = –40°C to 85°C, fs = 250 kHz, VDIG = VANA = 5 V, and using internal reference (unless otherwise noted). ADS8515I PARAMETER ADS8515IB TEST CONDITIONS UNIT MIN TYP Resolution MAX MIN TYP 16 MAX 16 Bits ANALOG INPUT Voltage range Impedance Capacitance ±10 ±10 8.885 8.
PAGE 4
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to 85°C, fs = 250 kHz, VDIG = VANA = 5 V, and using internal reference (unless otherwise noted). ADS8515I PARAMETER ADS8515IB TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX Data format (parallel 16 bits) Data coding (binary twos complement) VOL Low-level output voltage ISINK = 1.6 mA VOH High-level output voltage ISOURCE = 500 mA 0.4 0.
PAGE 5
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 PIN DESCRIPTIONS PIN DIGITAL I/O NAME NO. AGND1 2 Analog ground. Used internally as ground reference point. DESCRIPTION AGND2 5 Analog ground. BUSY 26 O At the start of a conversion, BUSY goes low and stays low until the conversion is completed and the digital outputs have been updated. BYTE 23 I Selects 8 most significant bits (low) or 8 least significant bits (high). CAP 4 Reference buffer capacitor. 2.
PAGE 6
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION vs INPUT FREQUENCY 95 95 90 85 80 75 70 1 10 100 fi - Input Frequency - kHz 80 75 10 100 fi - input frequency - kHz 1000 85 80 75 70 1 10 100 fi - input frequency - kHz Figure 2. Figure 3.
PAGE 7
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 TYPICAL CHARACTERISTICS (continued) NEGATIVE FULL-SCALE ERROR vs FREE-AIR TEMPERATURE 0.25 4 0.2 3 2 1 0 -1 -2 -3 -4 -5 -40 -25 -10 5 20 35 50 65 TA - Free-Air-Temperature - °C 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 -25 -10 5 20 35 50 65 0.08 External Reference 0.06 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.1 -40 80 -25 -10 5 20 35 50 65 Figure 10. Figure 11. Figure 12.
PAGE 8
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) INL 2 1.5 1 INL - lsb 0.5 0 -0.5 -1 -1.5 -2 0 10000 20000 30000 40000 50000 60000 70000 Code Figure 17. DNL 2 1.5 DNL - lsb 1 0.5 0 -0.5 -1 -1.5 -2 0 10000 20000 30000 40000 50000 60000 70000 Code Figure 18.
PAGE 9
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 BASIC OPERATION Figure 19 shows a basic circuit to operate the ADS8515 with a full parallel data output. Taking R/C (pin 24) low for a minimum of 40 ns initiates a conversion. BUSY (pin 26) goes low and stays low until the conversion is completed and the output registers are updated. Data are output in binary twos complement with the MSB on pin 6. BUSY going high can be used to latch the data.
PAGE 10
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com STARTING A CONVERSION The combination of CS (pin 25) and R/C (pin 24) held low for a minimum of 40 ns immediately puts the sample/hold of the ADS8515 in the hold state and starts conversion n. BUSY (pin 26) goes low and stays low until conversion n is completed and the internal output register has been updated. The ADS8515 begins tracking the input signal at the end of the conversion.
PAGE 11
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 PARALLEL OUTPUT (After a Conversion) After conversion n is completed and the output registers have been updated, BUSY (pin 26) goes high. Valid data from conversion n are available on D15 to D0 (pins 6 to 13 and 15 to 22). BUSY going high can be used to latch the data. Refer to Table 3 and Figure 21, Figure 22, and Figure 23 for timing specifications.
PAGE 12
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com tw1 R/C tc ta1 tw2 BUSY tpd td2 td1 Acquire MODE Convert Acquire tconv DATA BUS Previous Data Valid Previous Data Valid Hi−Z Convert tacq Not Valid Data Valid Hi−Z Data Valid td3 tdis tv Figure 21. Conversion Timing with Outputs Enabled after Conversion (CS Tied Low) tsu tsu tsu tsu R/C tw1 CS tpd tw2 BUSY td2 MODE Acquire Convert Acquire tconv Hi−Z State DATA BUS Data Valid ten Hi−Z State tdis Figure 22.
PAGE 13
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 ADC RESET The ADC reset function of the ADS8515 can be used to terminate the current conversion cycle. Bringing R/C low for at least 40 ns while BUSY is low will initiate the ADC reset. To initiate a new conversion, R/C must return to the high state and remain high long enough to acquire a new sample (see Table 3, tc) before going low to initiate the next conversion sequence.
PAGE 14
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com APPLICATION INFORMATION CALIBRATION The gain of the ADS8515 can be trimmed in software. To achieve optimum performance, several iterations may be required. Hardware Calibration To calibrate the gain of the ADS8515, install the resistors and potentiometer as shown in Figure 25(a). The calibration range is approximately ±100 mV. Software Calibration The offset and gain of the ADS8515 is calibrated with software.
PAGE 15
ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 CAP CAP (pin 4) is the output of the internal reference buffer. A 2.2-mF capacitor should be placed as close to the CAP pin as possible to provide optimum switching currents for the CDAC throughout the conversion cycle and compensation for the output of the internal buffer. Using a capacitor any smaller than 1 mF can cause the output buffer to oscillate and may not have sufficient charge for the CDAC. Capacitor values larger than 2.
PAGE 16
ADS8515 SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (August 2010) to Revision D Page • Deleted row from Absolute Maximum Ratings regarding VDIG to VANA ................................................................................. 2 • Deleted text regarding VANA from the pin 28 description in the Pin Description table .................................
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.
PAGE 18
PACKAGE OPTION ADDENDUM www.ti.com 3-Sep-2010 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS8515IBDBR SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.0 Q1 ADS8515IDBR SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.
PAGE 20
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8515IBDBR SSOP DB 28 2000 367.0 367.0 38.0 ADS8515IDBR SSOP DB 28 2000 367.0 367.0 38.
PAGE 21
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 22
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.