Datasheet

SPI INTERFACE
ADS8513
www.ti.com ...................................................................................................................................................... SLAS486C – JUNE 2007 – REVISED JANUARY 2009
For the fastest conversion rate, the baud rate should be set to 2 (4.19MHz SCK), DT set to 10, the first serial
transfer set to 8 bits, the second set to 16 bits, and DSCK disabled (in the command control byte). This allows for
a 23kSPS maximum conversion rate. For slower rates, DT should be increased. Do not slow SCK as this may
increase the chance of affecting the conversion results or accidently initiating a second conversion during the first
8-bit transfer.
In addition, CPOL and CPHA should be set to zero (SCK normally low and data captured on the rising edge).
The command control byte for the 8-bit transfer should be set to 20h and for the 16-bit transfer to 61h.
The SPI interface is generally only capable of 8-bit data transfers. For some microcontrollers with SPI interfaces,
it might be possible to receive data in a similar manner as shown for the QSPI interface in Figure 50 . The
microcontroller must fetch the eight most significant bits before the contents are overwritten by the least
significant bits.
A modified version of the QSPI interface shown in Figure 51 might be possible. For most microcontrollers with a
SPI interface, the automatic generation of the start-of-conversion pulse is impossible and has to be done with
software. This configuration limits the interface to dc applications because of the insufficient jitter performance of
the convert pulse itself.
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