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ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SOIC 20

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FEATURES APPLICATIONS

DESCRIPTION

Successive Approximation Register

Clock

Comparator

CDAC

Buffer

REF

CAP

10 kΩ

4.9 kΩ

Internal

+2.5 V Ref

4 kΩ

Serial

Data

Out

Control

BUSY

DATACLK

DATA

2.5 kΩ

9.8 kΩ

EXT/INT

R/C

SB/BTC

PWRD

ADS8508

SLAS433 – SEPTEMBER 2005

12-BIT 250-KSPS SERIAL CMOS SAMPLING ANALOG-TO-DIGITAL CONVERTER

• Industrial Process Control

• 250-kHz Sampling Rate

• Data Acquisition Systems

• 4-V, 5-V, 10-V, ±3.33-V, ±5-V, and ±10-V Input

• Digital Signal Processing

Ranges

• Medical Equipment

• 73-dB SINAD With 45-kHz Input

• Instrumentation

• ±0.45 LSB Max INL

• ±0.45 LSB Max DNL, 12-Bits No Missing

Codes

The ADS8508 is a complete 12-bit sampling

• ± 1 LSB Bipolar Zero Errors

analog-to-digital (A/D) converter using state-of-the-art

• ± 0.4 PPM/ ° C Bipolar Zero Error Drift

CMOS structures. It contains a complete 12-bit,

• Six Specified Input Ranges

capacitor-based, successive approximation register

(SAR) A/D converter with sample-and-hold, refer-

• SPI Compatible Serial Output with

ence, clock, and a serial data interface. Data can be

Daisy-Chain (TAG) Feature

output using the internal clock or can be

• 5-V Supply

synchronized to an external data clock. The ADS8508

• Pin-Compatible With ADS7808 (Low Speed)

also provides an output synchronization pulse for

and 16-Bit ADS8509/7809

ease of use with standard DSP processors.

• Uses Internal or External Reference

The ADS8508 is specified at a 250-kHz sampling rate

over the full temperature range. Precision resistors

• 70-mW Typ Power Dissipation at 250 KSPS

provide various input ranges including ±10 V and 0 V

• 20-Pin SO Package

to 5 V, while the innovative design allows operation

• Simple DSP Interface

from a single +5-V supply with power dissipation

under 100 mW.

The ADS8508 is available in a 20-pin SO package,

fully specified for operation over the industrial -40 °C

to 85 °C temperature range.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (29 pages)

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ADS8508 SLAS433 – SEPTEMBER 2005 12-BIT 250-KSPS SERIAL CMOS SAMPLING ANALOG-TO-DIGITAL CONVERTER FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • • • 250-kHz Sampling Rate 4-V, 5-V, 10-V, ±3.33-V, ±5-V, and ±10-V Input Ranges 73-dB SINAD With 45-kHz Input ±0.45 LSB Max INL ±0.45 LSB Max DNL, 12-Bits No Missing Codes ±1 LSB Bipolar Zero Errors ±0.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 PACKAGE/ORDERING INFORMATION (1) PRODUCT MINIMUM RELATIVE ACCURACY (LSB) NO MISSING CODE MINIMUM SINAD (dB) SPECIFICATION TEMPERATURE RANGE PACKAGE LEAD PACKAGE DESIGNATOR ADS8508IB ±0.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 ELECTRICAL CHARACTERISTICS (continued) At TA = -40°C to 85°C, fs = 250 kHz, VDIG = VANA = 5 V, using internal reference and fixed resistors (See Figure 28 and Figure 29) (unless otherwise specified) PARAMETER TEST CONDITIONS ±10 V range Full-scale error (4) (5) All other ranges Full-scale error drift MIN All other ranges Full-scale error drift Ext. Ref. with 0.1% external fixed resistors 0.5 0.5 ±7 0.5 -0.5 0.
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ADS8508 www.ti.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 TIMING REQUIREMENTS, TA = –40°C to 85°C PARAMETER MIN TYP MAX 6 20 ns 2.2 µs tw1 Pulse duration, convert td1 Delay time, BUSY from R/C low tw2 Pulse duration, BUSY low td2 Delay time, BUSY, after end of conversion 5 td3 Delay time, aperture 5 tconv Conversion time tacq Acquisition time tconv + tacq 40 UNIT ns ns ns 2.2 1.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Terminal Functions TERMINAL NAME DESCRIPTION NO. I/O AGND1 2 – Analog ground. Used internally as ground reference point. Minimal current flow. AGND2 7 – Analog ground BUSY 17 O Busy output. Falls when a conversion is started, and remains low until the conversion is completed and the data is latched into the output shift register. CAP 5 – Reference buffer capacitor. 2.2-µF Tantalum to ground. CS 16 – Chip select.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 PARAMETER MEASUREMENT INFORMATION CS R/C R/C CS tsu1 tsu1 tsu1 External DATACLK tsu1 External DATACLK CS Set Low, Discontinuous Ext DATACLK R/C Set Low, Discontinuous Ext DATACLK BUSY CS tsu2 tsu2 tsu3 1 External DATACLK R/C 2 CS Set Low, Discontinuous Ext DATACLK Figure 1.
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ADS8508 www.ti.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 PARAMETER MEASUREMENT INFORMATION (continued) tw1 R/C td1 tw2 BUSY td10 td3 td2 Error Correction Nth Conversion STATUS tsu3 tconv tc2 tsu1 External tw3 td11 tw4 1 0 DATACLK 2 3 4 5 8 9 10 11 12 SYNC = 0 td8 Nth Conversion Data D10 D11 DATA D09 D08 D07 D06 D04 D03 D02 td8 D01 D00 Rising DATACLK change DATA, tw1 + tsu1 Starts READ TAG is not recommended for this mode. There is not enough time to do so without violating td11.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 PARAMETER MEASUREMENT INFORMATION (continued) tw1 R/C td1 tw2 BUSY td3 td10 td2 Error Correction Nth Conversion STATUS tsu3 tconv tsu1 tsu1 External tw3 tsu1 0 DATACLK tc2 tw4 1 2 3 td11 4 5 6 7 10 11 12 13 14 td7 tc2 SYNC = 0 td8 EXT/INT tied high, CS and TAG tied low td8 Nth Conversion Data D11 DATA D10 D09 D08 D07 D06 D04 D03 D02 D01 D00 tw1 + tsu1 Starts READ TAG is not recommended for this mode.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Tag 14 Tag 13 Tag 12 Tag 11 Tag 1 TAG Tag 2 Bit 11 (MSB) DATA Tag 0 t c2 t su2 t su1 0 SYNC BUSY R/C CS External DATACLK t w1 t su2 t d1 t w3 t d7 1 t c2 t w4 2 t d8 3 Bit 10 4 Bit 1 13 14 Bit 0 (LSB) Tag 0 t d9 Tag 1 Tag 15 PARAMETER MEASUREMENT INFORMATION (continued) Figure 8.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Tag 14 Tag 13 Tag 1 TAG Tag 12 Bit 15 (MSB) DATA SYNC t d1 BUSY R/C CS External DATACLK t su2 t w3 t c2 t w1 t w4 t su1 t su1 Tag 0 t c2 t d8 t d10 Bit 0 (LSB) Tag 0 t d8 Tag 1 Tag 15 PARAMETER MEASUREMENT INFORMATION (continued) Figure 9.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION vs FREE-AIR TEMPERATURE 110 90 80 70 −20 0 20 40 60 −95 −90 −85 −80 −70 −40 80 70 60 50 −75 TA − Free-Air-Temperature − C fi = 45 kHz −20 0 20 40 60 40 −40 80 −20 0 20 40 60 80 TA − Free-Air-Temperature − C TA − Free-Air-Temperature − C Figure 10. Figure 11. Figure 12.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 TYPICAL CHARACTERISTICS (continued) INTERNAL REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 0.20 0.10 Internal Reference Voltage − V Full Scale Error − %FSR 0.15 External Reference, ±10 V Range for 5 Representative Parts 0.05 0 −0.05 −0.10 −0.15 −0.20 −40 −25 −10 5 20 35 50 65 80 TA − Free-Air Temperature − C SUPPLY CURRENT vs FREE-AIR TEMPERATURE 2.510 20 2.508 19 2.506 18 2.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 TYPICAL CHARACTERISTICS (continued) FFT (1 kHz Input) 20 8192 Points fs = 250 KSPS fi = 1 kHz, 0dB SINAD = 73.47 dB THD = −94.03 dB 0 Amplitude − dB −20 −40 −60 −80 −100 −120 −140 −160 0 25 50 75 100 125 75 100 125 f − Frequency − Hz Figure 24. FFT (45 kHz Input) 20 8192 Points fs = 250 KSPS fi = 45 kHz, 0dB SINAD = 73.62 dB THD = −94.03 dB 0 Amplitude − dB −20 −40 −60 −80 −100 −120 −140 −160 0 25 50 f − Frequency − Hz Figure 25.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 BASIC OPERATION Two signals control conversion in the ADS8508: CS and R/C. These two signals are internally ORed together. To start a conversion the chip must be selected, CS low, and the conversion signal must be active, R/C low. Either signal can be brought low first. Conversion starts on the falling edge of the second signal. BUSY goes low when conversion starts and returns high after the data from that conversion is shifted into the internal storage register.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Whether reading during sampling or during conversion a SYNC pulse is generated whenever at least one rising edge of the external clock occurs while the part is not in the read state. In the discontinuous external clock with SYNC mode a SYNC pulse follows the first rising edge after the read command. The data is shifted out after the SYNC pulse. The first rising clock edge after the read command generates a SYNC pulse.
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ADS8508 www.ti.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 The external reference voltage can vary from 2.3 V to 2.7 V. The reference voltage determines the size of the least significant bit (LSB). The larger reference voltages produce a larger LSB, which can improve SNR. Smaller reference voltages can degrade SNR. +15V 2.2 F 22 pF ADS8508 200 100 nF GND R1IN 1 k Pin 7 1 k Pin 2 Vin 22 pF 10 pF Pin 1 AGND 100 Pin5 − OPA 627 Pin 6 + Pin3 R2IN GND 33.2 k GND R3IN Pin4 CAP 2.2 F GND AGND2 2.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Table 4. Control Truth Table (continued) Selecting output format x x x x x x 0 Serial data is output in binary 2s complement format. x x x x x x 1 Serial data is output in straight binary format. Table 5. Output Codes and Ideal Input Voltages DIGITAL OUTPUT DESCRIPTION Full-scale range BINARY 2's COMPLEMENTS (SB/BTC LOW) ANALOG INPUT BINARY CODE HEX CODE BINARY CODE HEX CODE 3.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Input Range With Trim (Adjust Offset First at 0 V, Then Adjust Gain) Without Trim 200 Ω 200 Ω R1IN R1IN AGND1 AGND1 100 Ω 100 Ω 0 V − 10 V VIN R2IN 33.2 kΩ R3IN R2IN VIN 33.2 kΩ 2.2 µF +5V CAP + 50 kΩ 2.2 µF + R3IN 2.2 µF + +5V CAP 576 kΩ 50 kΩ REF REF + 2.2 µF AGND2 200 Ω AGND2 200 Ω R1IN R1IN AGND1 100 Ω R2IN 33.2 kΩ VIN +5 V CAP 2.2 µF + +5 V 50 kΩ 2.2 µF REF 2.2 µF R2IN 33.
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ADS8508 www.ti.com SLAS433 – SEPTEMBER 2005 Input Range With Trim (Adjust Offset First at 0 V, Then Adjust Gain) Without Trim 200 Ω VIN 200 Ω R1IN R1IN VIN AGND1 AGND1 100 Ω 100 Ω R2IN ±10 V R2IN +5 V R3IN 33.2 kΩ + 2.2 F + R3IN +5 V 50 kΩ CAP 2.2 F 33.2 kΩ REF 2.2 µF 576 kΩ + 2.2 µF + CAP REF 50 kΩ AGND2 AGND2 200 Ω 200 Ω R1IN R1IN AGND1 AGND1 100 Ω VIN 33.2 kΩ ±5V R3IN CAP 50 kΩ 2.2 µF + 2.2 µF R2IN R3IN + 2.2 µF +5 V +5 V + 100 Ω VIN 33.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 22-Aug-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 21-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADS8508IBDWR Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.8 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.3 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 21-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8508IBDWR SOIC DW 20 2000 367.0 367.0 45.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.