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SPI™ INTERFACE

ADS8507

SLAS381 – DECEMBER 2006

APPLICATION INFORMATION (continued)

For the fastest conversion rate, the baud rate should be set to 2 (4.19-MHz SCK), DT set to 10, the first serial

transfer set to 8 bits, the second set to 16 bits, and DSCK disabled (in the command control byte). This allows

for a 23-kHz maximum conversion rate. For slower rates, DT should be increased. Do not slow SCK as this may

increase the chance of affecting the conversion results or accidently initiating a second conversion during the

first 8-bit transfer.

In addition, CPOL and CPHA should be set to zero (SCK normally low and data captured on the rising edge).

The command control byte for the 8-bit transfer should be set to 20

and for the 16-bit transfer to 61

The SPI interface is generally only capable of 8-bit data transfers. For some microcontrollers with SPI interfaces,

it might be possible to receive data in a similar manner as shown for the QSPI interface in Figure 49 . The

microcontroller needs to fetch the 8 most significant bits before the contents are overwritten by the least

significant bits.

A modified version of the QSPI interface shown in Figure 50 might be possible. For most microcontrollers with a

SPI interface, the automatic generation of the start-of-conversion pulse is impossible and has to be done with

software. This limits the interface to DC applications due to the insufficient jitter performance of the convert pulse

itself.

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