Datasheet

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OPA 627
GND
GND
GND
GND
GND
Pin1
Pin 7
−
Pin 2
+
Pin3
Pin4
Pin 6
−15V
+15 V
Vin
2.2 mF
100 nF
2 kW
22 pF
2 kW
22 pF
200 W
100 W
33.2 kW
2.2 mF
2.2 mF
100 nF
2.2 mF
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
ADS8506
OPA 132
or
AGND2
DGND
GND
CALIBRATION
Hardware Calibration
1
2
3
4
5
AGND2
CAP
REF
AGND1
+
2.2 µF
200 Ω
V
IN
R1
IN
R2
IN
6
50 kΩ
+ 5 V
1 MΩ
+
2.2 µF
33.2 kΩ
50 kΩ
100 Ω
+ 5 V
1
2
3
4
5
AGND2
CAP
REF
AGND1
+
200 Ω
33.2 kΩ
50 kΩ
50 kΩ
2.2 µF
6
R1
IN
R2
IN
100 Ω
V
IN
+
2.2 µF
+5 V
1 MΩ
1
2
3
4
5
AGND2
CAP
REF
AGND1
+
200 Ω
33.2 kΩ
50 kΩ
50 kΩ
2.2 µF
6
R1
IN
R2
IN
100 Ω
V
IN
+
2.2 µF
+5 V
1 MΩ
±10 V 0 V to 5 V 0 V to 4 V
ADS8506
SLAS484B – SEPTEMBER 2007 – REVISED DECEMBER 2007
Figure 41. Typical Driving Circuit ( ± 10 V, No Trim)
To calibrate the offset and gain of the ADS8506 in hardware, install the resistors shown in Figure 42 . Table 7
lists the hardware trim ranges relative to the input for each input range.
Table 7. Offset and Gain Adjust Ranges for Hardware Calibration (see Figure 42 )
INPUT RANGE OFFSET ADJUST RANGE (mV) GAIN ADJUST RANGE (mV)
± 10 V ± 15 ± 60
0 V to 5 V ± 4 ± 30
0 V to 4 V ± 3 ± 30
Figure 42. Circuit Diagrams (With Hardware Trim)
Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): ADS8506