Datasheet

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ADS8506
+5 V
+
+
Convert Pulse
40 ns Min
200 Ω
0.1 µF 10 µF
100 Ω
+
2.2 µF
66.5 kΩ
+5 V
Parallel Output
B7B8B9B10B11
(MSB)
Pin 21
LOW
B1B2B3Pin 21
HIGH
NC
(1)
B4B5B6
B0
(LSB)
B2
BUSY
R/C
BYTE
± 10 V
2.2 µF
SERIAL OUTPUT
ADS8506
SLAS484B – SEPTEMBER 2007 – REVISED DECEMBER 2007
LOW until the conversion is completed and the output register is updated. If BYTE (pin 21) is LOW, the eight
most significant bits (MSBs) will be valid when BUSY rises; if BYTE is HIGH, the four least significant bits (LSBs)
will be valid when BUSY rises. Data will be output in binary 2's complement (BTC) format. BUSY going HIGH
can be used to latch the data. After the first byte has been read, BYTE can be toggled allowing the remaining
byte to be read. All convert commands will be ignored while BUSY is LOW.
The ADS8506 begins tracking the input signal at the end of the conversion. Allowing 25 µ s between convert
commands assures accurate acquisition of a new signal.
The offset and gain are adjusted internally to allow external trimming with a single supply. The external resistors
compensate for this adjustment and can be left out if the offset and gain will be corrected in software (refer to the
Calibration section).
Figure 31. Basic ± 10-V Operation, Both Parallel and Serial Output
Figure 32 shows a basic circuit to operate the ADS8506 with a ± 10-V input range and serial output. Taking R/ C
(pin 22) LOW for 40 ns (12 µ s max) will initiate a conversion and output valid data from the previous conversion
on SDATA (pin 19) synchronized to 12 clock pulses output on DATACLK (pin 18). BUSY (pin 24) will go LOW
and stay LOW until the conversion is completed and the serial data has been transmitted. Data will be output in
BTC format, MSB first, and will be valid on both the rising and falling edges of the data clock. BUSY going HIGH
can be used to latch the data. All convert commands will be ignored while BUSY is LOW.
The ADS8506 begins tracking the input signal at the end of the conversion. Allowing 25 µ s between convert
commands assures accurate acquisition of a new signal.
The offset and gain are adjusted internally to allow external trimming with a single supply. The external resistors
compensate for this adjustment and can be left out if the offset and gain are corrected in software (refer to the
Calibration section).
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