Datasheet

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5 EVM Operation
EVM Operation
The maximum analog input swing is +/-10Vpp. Offset trim can be accomplished on board via R3. Single
amplifier U8 in an industry standard SOIC 8 package can be installed to do on board signal conditioning if
desired. Please refer to Section 12 of Op Amps for Everyone (Doc. No. SLOD006) for information on
various circuit applications.
Once power is applied to the EVM, the analog input source can be connected directly to J1 (top or bottom
side) or through optional amplifier and signal conditioning modules using the 5-6K Interface Board or
HPA449. Jumper W1 allows the EVM user to choose which analog signal applied to J1 is directed to the
input of the ADC, providing the ability to stack up to four ADS78/8505EVM's using the address decoder
found at U5.
The digital control signals can be applied directly to J5 (top or bottom side). The ADS78/8505EVM can
also be connected directly to the 5-6K Interface Board for use with a variety of C5000 and C6000 series
DSP Starter Kits (DSK). The analog and digital input connectors are designed to allow pattern generators
and/or logic analyzers to be connected to the EVM using standard ribbon type cables on 0.1" centers.
No specific evaluation software is provided with this EVM, however, code examples are available that
show how to use this EVM with a variety of digital signal processors from Texas Instruments Incorporated.
Check the product folders or send e-mail to [e-mail] for a listing of available code
examples. The EVM Gerber files are available on request.
Table 4 shows the factory default jumper locations for the ADS78/8505EVM.
Table 4. Factory Default Jumper Locations
Jumper Function Default Condition
W1 Controls application of the applied analog signal to VIN 1–2
W2 Controls the state of BYTE Closed
W3 Controls application of the VIO (3.3 (default) or 5V) 1–2
W4 Controls the application of the reference voltage 7–8
W5 Controls the source of the conversion start signal applied to the ADC's R/C pin 1–2
W6 Controls the application of optional signal conditioning circuitry 1–2
W7 Controls the application of the voltage at the CAP pin or offest trim through R3 to 33.2 k Ω 1–2
resistor R4.
W8 Determines which decoded address the ADC will respond to. 1–2
ADS78/8505EVM User's GuideSLAU145 – December 2004 5