Datasheet
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Digital Interface
Conversions are initiated on the falling edge of the convert start signal. It is therefore critical to provide a
clean, low-jitter, Convert Start ( CONVST) pulse when measuring large amplitude and/or high-frequency
input signals.
The CONVST signal can be applied to the ADS848x from the decoder outputs, at J6 pin 5, or from
connector P3 pin 17. Address decoder SN74ACH138 can be used to generate the Read ( RD) and
CONVST signals to the converter. Jumpers W3 and W4 allow the user to assign these two signals to
different addresses in memory. This option allows for the stacking of up to two ADS848xEVMs into
processor memory. See Table 4 for jumper settings. If a Convert Start signal is applied directly to P3 pin
17, it is then necessary to short W6 pins 1-2. This configuration bypasses the decoder output selected by
the position of W4.
Note: The evaluation module does not allow the Chip Select ( CS) line of the converter to be
assigned to different memory locations. It is therefore suggested that the CS line be
grounded or wired to an appropriate signal of the processor.
Table 4. Jumper Settings
Pin No.
Reference
Designator Description 1-2 2-3
Set digital buffer supply voltage to +5 V Installed
(1)
Not installed
W1
Set digital buffer supply voltage to +3.3 V Not Installed Installed
Apply inverted BUSY to INTC signal Installed
(1)
Not installed
W2
Apply BUSY signal to INTC signal Not installed Installed
Set RD signal to decoder output three [0x3]. Installed
(1)
Not installed
W3
Set RD signal to decoder output four [0x4]. Not installed Installed
Set CONVST signal to decoder output one [0x1]. Installed
(1)
Not installed
W4
Set CONVST signal to decoder output two [0x2]. Not Installed Installed
W5 Set DC_CS to CS of ADS848x Installed
(1)
N/A
Set DC_CONVST to CONVST of ADS848x. Installed
(1)
Installed
W6
Set decoder output to CONVST of ADS848x. Not installed Installed
(1)
(1)
Indicates factory-installed option.
The data bus is available at connector P2; see Table 5 for pinout information.
Table 5. Data Bus Connector P2
Description Signal Name Connector Pin No. Signal Name Description
Data bit 0 DB0 P2.1 P2.2 GND Ground
Data bit 1 DB1 P2.3 P2.4 GN D Ground
Data bit 2 DB2 P2.5 P2.6 GND Ground
Data bit 3 DB3 P2.7 P2.8 GND Ground
Data bit 4 DB4 P2.9 P2.10 GND Ground
Data bit 5 DB5 P2.11 P2.12 GND Ground
Data bit 6 DB6 P2.13 P2.14 GND Ground
Data bit 7 DB7 P2.15 P2.16 GND Ground
Data bit 8 DB8 P2.17 P2.18 GND Ground
Data bit 9 DB9 P2.19 P2.20 GND Ground
Data bit 10 DB10 P2.21 P2.22 GND Ground
Data bit 11 DB11 P2.23 P2.24 GND Ground
Data bit 12 DB12 P2.25 P2.26 GND Ground
Data bit 13 DB13 P2.27 P2.28 GND Ground
Data bit 14 DB14 P2.29 P2.30 GND Ground
SLAU186A – August 2006 – Revised September 2008 ADS848xEVM 7
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