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4 Power Supplies
Power Supplies
Table 6. Pinout for Converter Control Connector J3
(1)
Connector.Pin Signal Description
J3.1 CS Chip Select pin. Active Low
J3.3 RD Read Pin. Active Low
J3.5 CONVST Convert start pin. Active Low
J3.7 BYTE BYTE mode pin. Used for 8-bit buses
J3.9 RESET Reset pin. Active Low
J3.11 BUSY
(2)
Converter Status Output. High when a conversion is in progress
(1) All even-numbered pins of J3 are tied to DGND.
(2) Error on silkscreen of Rev A evaluation module. J3 pin 11 reads BUS16/18. The signal connected is
BUSY, as shown in Section 8 .
The EVM accepts four power supplies.
• A dual ± Vs dc supply for the dual supply operational amplifiers. Maximum voltage recommended is ± 7
VDC
• A single 5-V dc supply for analog section of the board (A/D + Reference).
• A single 5-V or 3.3-V dc supply for digital section of the board (A/D + address decoder + buffers).
There are two ways to provide these voltages.
1. Wire in voltages at test points on the EVM. See Table 7
Table 7. Power Supply Test Points
Test Point Signal Description
TP14 +BVDD Apply 3.3 VDC or 5 VDC. See ADC data sheet for full range.
TP11 +AVCC Apply 5 VDC
TP12 +VA Apply 7 VDC. Positive supply for amplifier
TP13 –VA Apply -7 VDC. Negative supply for amplifier
2. Use the power connector J1, and derive the voltages elsewhere. The pinout for this connector is
shown in Table 8 . If using this connector, then set W1 jumper to connect 3.3 VD or 5 VD from the
connector to +BVDD. Short between pins 1-2 to select 5 VD, or short between pins 2-3 to select 3.3
VD as the source for the digital buffer voltage supply (+BVDD).
Table 8. Power Connector, J1, Pinout
Signal Power Connector - J1 Signal
+VA (7 V) 1 2 –VA (–7V)
5 VA 3 4 N/C
DGND 5 6 AGND
N/C 7 8 N/C
3.3 VD 9 10 5 VD
6 SLAU126A – December 2003 – Revised September 2004ADS8402/ADS8406/ADS8412 EVM User's Guide