Datasheet

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ADS8405
SLAS427 – DECEMBER 2004
As with the AGND connections, +VA should be connected to a 5-V power supply plane or trace that is separate
from the connection for digital logic until they are connected at the power entry point. Power to the ADS8405
should be clean and well bypassed. A 0.1-µF ceramic bypass capacitor should be placed as close to the device
as possible. See Table 2 for the placement of the capacitor. In addition, a 1-µF to 10-µF capacitor is
recommended. In some situations, additional bypassing may be required, such as a 100-µF electrolytic capacitor
or even a Pi filter made up of inductors and capacitors—all designed to essentially low-pass filter the 5-V supply,
removing the high frequency noise.
Table 2. Power Supply Decoupling Capacitor Placement
POWER SUPPLY PLANE SUPPLY PINS CONVERTER ANALOG SIDE CONVERTER DIGITAL SIDE
(4,5), (8,9), (10,11), (13,15),
Pin pairs that require shortest path to decoupling capacitors (24,25), (34, 35)
(43,44), (45,46)
Pins that require no decoupling 12, 14 37
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