Datasheet

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1 EVM Overview
1.1 Features
2 Analog Interface
2.1 Signal Conditioning
EVM Overview
• Full-featured evaluation board for the ADS8372 16-bit, 600 kHz, single channel, high-speed
serial-interface analog-to-digital converter (ADC)
• On board signal conditioning
• On board reference
• Input and output digital buffer
The ADS8372EVM ships with buffer U13 configured in a unity-gain, single-ended to differential out
configuration. The common-mode voltage pin of the THS4131 is factory set to 2.0 V on the evaluation
module, and can be adjusted using potentiometer RP1. The potentiometer connects between the output of
reference buffer U3 and ground. The single-ended input signal can be applied at pin-connector P1 pin 2 or
via SMA connectors J2 (non-inverting input). The buffer circuit can be reconfigured for a fully differential
input by installing resistors R4 and R31 and removing R16. The inverting leg of the differential signal can
be connected to connector P1 pin 1 or SMA connector J1 (inverting input). See Table 1 for the pinout of
the analog connector, P1. See Section 9 for the EVM schematic diagrams.
The analog-to-digital converter accepts a pseudo-bipolar differential input. A pseudo-bipolar differential
signal is a differential signal that has a common-mode voltage such that each leg is always equal to or
above zero volts. The common mode voltage should be half the reference voltage. The peak-to-peak
amplitude on each input leg can be as large as the reference voltage.
Table 1. Analog Input Connector
Description Signal Name Connector pin# Signal Name Description
Inverting Input –IN P1.1 P1.2 +IN Non-inverting Input
Reserved N/A P1.3 P1.4 N/A Reserved
Reserved N/A P1.5 P1.6 N/A Reserved
Reserved N/A P1.7 P1.8 N/A Reserved
Pin tied to Ground AGND P1.9 P1.10 N/A Reserved
Pin tied to Ground AGND P1.11 P1.12 N/A Reserved
Reserved N/A P1.13 P1.14 N/A Reserved
Pin tied to Ground AGND P1.15 P1.16 N/A Reserved
Pin tied to Ground AGND P1.17 P1.18 N/A Reserved
Reserved N/A P1.19 P1.20 REF+ External Reference Input
It is a recommended practice to buffer the analog input to any SAR-type converter with a high-speed,
low-noise amplifier with fast settling time. The amplifier circuit shown in Figure 1 is the buffer circuit used
on the ADS8372EVM. This circuit consists of the THS4131, a high-speed, low-noise, fully differential
amplifier configured as a single-ended in to differential out, unity gain buffer. This circuit was optimized to
achieve the AC specifications (i.e., SNR, THD, SFDR, etc.) listed in the ADS8372 data sheet.
The type of input capacitors used in the signal path can make a few decibels of difference in AC
performance. Polypropylene or C0G-type capacitors are recommended for the input signal path.
ADS8372EVM 2 SLAU160 – July 2005