Datasheet

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SLAS390B − JUNE 2003 − REVISED FEBRUARY 2005
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A similar precaution applies when RD is used to three-state the output buffers after a data-read operation. A minimum
quite period of 125 ns is also required from the instant the data is changed on the bus (such as the falling or rising
edge of RD
, the falling or rising edge of BYTE, and the falling is made available on the data bus pins to the sampling
instant (falling edge of CONVST). Figure 42 shows the timing of the input control signals that allow these conditions
to be satisfied.
t
conv
CONVST
BUSY
CS = 0
RD
400 ns
t
acq
t
h1
< 400 ns
t
h2
> 125 ns
(1)
Quiet Zone (No bus activity)
125 ns
(1)
730 ns
(1)
t
w1
< 400 ns
Figure 42. Bus Activity Split to Avoid Quiet Zone
If the RD pin is brought high to three-state the data buses, the three-stating operation should occur 125 ns before
the end of the acquisition phase. Figure 43 shows the recommended timing for using the ADS8381 in this mode of
operation. The same principle applies to other bus activities such as BYTE.
t
conv
CONVST
BUSY
CS = 0
RD
400 ns
t
acq
t
h2
> 125 ns
730 ns
(1)
125 ns
(1)
t
w1
< 400 ns
(1)
Quiet Zone (No bus activity)
Figure 43. Read Timing if the Bus Needs to be Three-Stated