Datasheet

Signal Conditioning
2-2
2.1 Signal Conditioning
The factory recommends the analog input to any SAR-type converter be
buffered and low-pass filtered. It is important to note that the input buffer circuit
of the ADS8371EVM, shown in Figure 2−1, uses the THS4031 in an inverting
gain-of-one configuration. The amplifier is not stable in a conventional
gain-of-one configuration. The THS4031 was selected for its low noise, high
slew rate, and fast settling time. The low-pass filter resistor and capacitor
values are selected such that ADS8371EVM meets the 100-kHz AC
performance specifications listed in the data sheet. The series resistor works
with the capacitor to filter the input signal, but also isolates the amplifier from
the 6800-pF capacitive load. The capacitor to ground at the input of the A/D
works with the series resistor to filter the input signal, and acts like a charge
reservoir. This external filter capacitor works with the amplifier to charge the
internal sampling capacitor during sampling mode.
The EVM has a provision to offset the input voltage by adjusting R7, a 10-kΩ
potentiometer.
Figure 2−1. Input Buffer Circuit
1 kΩ
1 kΩ
−V
CC
V
I
0.1 µF
1 µF
12 Ω
(+) IN
(−) IN
6800 pF
1 µF
0.1 µF
22 µF
4.096 V
10 kΩ
+V
CC
THS4031
−
+
R6
R3
C34
C5
R2
C10
C32
C31
U1
R7
C1
SJP1