Datasheet

INTRODUCTION
REFERENCE
ANALOG INPUT
SAMPLE AND HOLD
ADS8365
ADS8365
Single-EndedInput
Common
Voltage
-V to+V
REF REF
peak-to-peak
DifferentialInput
Common
Voltage
V
REF
peak-to-peak
V
REF
peak-to-peak
ADS8365
SBAS362C AUGUST 2006 REVISED MARCH 2008 ....................................................................................................................................................
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5ns. The average delta of repeated aperture delay
The ADS8365 is a high-speed, low-power,
values (also known as aperture jitter) is typically
six-channel simultaneous sampling and converting,
50ps. These specifications reflect the ability of the
16-bit ADC that operates from a single +5V supply.
ADS8365 to capture ac input signals accurately at the
The input channels are fully differential with a typical
exact same moment in time.
common-mode rejection of 80dB. The ADS8365
contains six 4 µ s successive approximation ADCs, six
differential sample-and-hold amplifiers, an internal
+2.5V reference with REF
IN
and REF
OUT
pins, and a
Under normal operation, REF
OUT
(pin 61) can be
high-speed parallel interface. There are six analog
directly connected to REF
IN
(pin 62) to provide an
inputs that are grouped into three channel pairs (A, B,
internal +2.5V reference to the ADS8365. The
and C). There are six ADCs, one for each input that
ADS8365 can operate, however, with an external
can be sampled and converted simultaneously, thus
reference in the range of 1.5V to 2.6V, for a
preserving the relative phase information of the
corresponding full-scale range of 3.0V to 5.2V, as
signals on both analog inputs. Each pair of channels
long as the input does not exceed the AV
DD
+ 0.3V
has a hold signal ( HOLDA, HOLDB, and HOLDC) to
limit.
allow simultaneous sampling on each channel pair,
The reference output of the ADS8365 has an
on four or on all six channels. The part accepts a
impedance of 2k . The high impedance reference
differential analog input voltage in the range of V
REF
input can be driven directly. For an external resistive
to +V
REF
, centered on the common-mode voltage
load, an additional buffer is required. A load
(see the Analog Input section). The ADS8365 also
capacitance of 0.1 µ F to 10 µ F should be applied to
accepts bipolar input ranges when a level shift circuit
the reference output to minimize noise. If an external
is used at the front end (see Figure 26 ).
reference is used, the three input buffers provide
A conversion is initiated on the ADS8365 by bringing
isolation between the external reference and the
the HOLDX pin low for a minimum of 20ns. HOLDX
CDACs. These buffers are also used to recharge all
low places the sample-and-hold amplifiers of the X
the capacitors of all CDACs during conversion.
channels in the hold state simultaneously and the
conversion process is started on each channel. The
EOC output goes low for half a clock cycle when the
The analog input is bipolar and fully differential. There
conversion is latched into the output register. The
are two general methods of driving the analog input
data can be read from the parallel output bus
of the ADS8365: single-ended or differential, as
following the conversion by bringing both RD and CS
shown in Figure 21 and Figure 22 . When the input is
low. Conversion time for the ADS8365 is 3.2 µ s when
single-ended, the IN input is held at the
a 5MHz external clock is used. The corresponding
common-mode voltage. The +IN input swings around
acquisition time is 0.8 µ s. To achieve the maximum
the same common voltage and the peak-to-peak
output data rate (250kSPS), the read function can be
amplitude is the (common-mode + V
REF
) and the
performed during the next conversion. NOTE: This
(common-mode V
REF
). The value of V
REF
determines
mode of operation is described in more detail in the
the range over which the common-mode voltage may
Timing and Control section of this data sheet.
vary (see Figure 23 ).
The sample-and-hold amplifiers on the ADS8365
allow the ADCs to accurately convert an input sine
wave of full-scale amplitude to 16-bit resolution. The
input bandwidth of the sample-and-hold amplifiers is
greater than the Nyquist rate (Nyquist = 1/2 of the
sampling rate) of the ADC, even when the ADC is
operated at its maximum throughput rate of 250kSPS.
The typical small-signal bandwidth of the
sample-and-hold amplifiers is 10MHz. Typical
aperture delay time (or the time it takes for the
ADS8365 to switch from the sample to the hold mode
following the negative edge of the HOLDX signal) is
Figure 21. Methods of Driving the ADS8365
Single-Ended or Differential
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