Datasheet

5-2
The following table shows the default jumper locations of the ADS8364 EVM:
Jumper
Default
Position
Function
W1 W2
W3 W4
1-2 1-2: AINx samples analog signal applied at J1
2-3: AINx samples signal from analog front end (U2)
W5 Closed Closed: BYTE pin of ADS8342 pulled low
Open: BYTE pin of ADS8342 pulled high
W6 Closed Closed: CLKDIV0 pin of ADS8342 pulled low (See Section 3.1)
Open: CLKDIV0 pin of ADS8342 pulled high
W7 Closed Closed: CLKDIV1 pin of ADS8342 pulled low (See Section 3.1)
Open: CLKDIV1 pin of ADS8342 pulled high
W8 2-3 1-2: CLK is driven by an external clock EXT CLK buffered by U6
2-3: CLK is driven by TOUT signal from J4
W9 1-2 1-2: Digital output buffer U3 is enabled by DC_CSa signal applied at J4
2-3: Digital output buffer U3 is enabled by RD and the decoded address from U7
(See W11)
W10 1-2 1-2: U2 - input driven by signal applied to analog INPUT SMA_J connector
2-3: U2 - input connected to ground
W11 5-6 Address decode select
1-2: 3
3-4: 2
5-6: 1
7-8: 0
W12 2-3 1-2: U2 + input driven by signal applied to analog INPUT SMA_J connector
2-3: U2 + input connected to ground