Datasheet
ADS8341
2
SBAS136D
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
MAXIMUM NO
INTEGRAL MISSING
LINEARITY CODES SPECIFICATION
ERROR ERROR TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT (LSB) (LSB) RANGE PACKAGE DESIGNATOR
(1)
NUMBER MEDIA
ADS8341E 8 14 –40°C to +85°C SSOP-16 DBQ ADS8341E Rails
" " " " " " ADS8341E/2K5 Tape and Reel
ADS8341EB 6 15 –40°C to +85°C SSOP-16 DBQ ADS8341EB Rails
" " " " " " ADS8341EB/2K5 Tape and Reel
NOTE: (1) For the most current specifications and package information, refer to our web site www.ti.com.
PIN CONFIGURATIONS
Top View SSOP
PACKAGE/ORDERING INFORMATION
PIN DESCRIPTIONS
PIN NAME DESCRIPTION
1+V
CC
Power Supply, 2.7V to 5V
2 CH0 Analog Input Channel 0
3 CH1 Analog Input Channel 1
4 CH2 Analog Input Channel 2
5 CH3 Analog Input Channel 3
6 COM Ground Reference for Analog Inputs. Sets zero code voltage in single-ended mode. Connect this pin to ground or ground reference
point.
7 SHDN Shutdown. When LOW, the device enters a very low power shutdown mode.
8V
REF
Voltage Reference Input. See Electrical Characteristics Table for ranges.
9+V
CC
Power Supply, 2.7V to 5V
10 GND Ground. Connect to Analog Ground
11 GND Ground. Connect to Analog Ground.
12 DOUT Serial Data Output. Data is shifted on the falling edge of DCLK. This output is high impedance when CS is HIGH.
13 BUSY Busy Output. This output is high impedance when CS is HIGH.
14 DIN Serial Data Input. If CS is LOW, data is latched on rising edge of DCLK.
15 CS Chip Select Input. Controls conversion timing and enables the serial input/output register.
16 DCLK External Clock Input. This clock runs the SAR conversion process and synchronizes serial data I/O. Maximum input clock frequency
equals 2.4MHz to achieve 100kHz sampling rate.
ABSOLUTE MAXIMUM RATINGS
(1)
+V
CC
to GND ........................................................................ –0.3V to +6V
Analog Inputs to GND ............................................ –0.3V to +V
CC
+ 0.3V
Digital Inputs to GND ........................................................... –0.3V to +6V
Power Dissipation .......................................................................... 250mW
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ........................................–40°C to +85°C
Storage Temperature Range ......................................... –65°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
1
2
3
4
5
6
7
8
+V
CC
CH0
CH1
CH2
CH3
COM
SHDN
V
REF
DCLK
CS
DIN
BUSY
DOUT
GND
GND
+V
CC
16
15
14
13
12
11
10
9
ADS8341