Datasheet

ADS8329
ADS8330
www.ti.com ................................................................................................................................................... SLAS516C – DECEMBER 2006 – REVISED JULY 2009
Deep Power-Down Mode
Deep power-down mode can be activated by writing to configuration register bit CFR_D2. When the device is in
deep power-down mode, all blocks except the interface are in power-down. The external SCLK is blocked to the
analog block. The analog blocks no longer have bias currents and the internal oscillator is turned off. In this
mode, supply current falls from 7 mA to 4 nA in 100 ns. The wake-up time after a power-down is 1 µ s. When bit
D2 in the configuration register is set to 0, the device is in deep power-down. Setting this bit to 1 or sending a
wake-up command can resume the converter from the deep power-down state.
Nap Mode
In nap mode the ADS8329/230 turns off biasing of the comparator and the mid-volt buffer. In this mode supply
current falls from 7 mA in normal mode to about 0.3 mA in 200 ns after the configuration cycle. The wake-up
(resume) time from nap power-down mode is 3 CCLKs (120 ns with a 24.5-MHz conversion clock). As soon as
the CFR_D3 bit in the control register is set to 0, the device goes into nap power-down mode, regardless of the
conversion state. Setting this bit to 1 or sending a wake-up command can resume the converter from the nap
power-down state.
Auto Nap Mode
Auto nap mode is almost identical to nap mode. The only difference is the time when the device is actually
powered down and the method to wake up the device. Configuration register bit D4 is only used to
enable/disable auto nap mode. If auto nap mode is enabled, the device turns off biasing after the conversion has
finished, which means the end of conversion activates auto nap power-down mode. Supply current falls from 7
mA in normal mode to about 0.3 mA in 200 ns. A CONVST resumes the device and turns biasing on again in 3
CCLKs (120 ns with a 24.5-MHz conversion clock). The device can also be woken up by disabling auto nap
mode when bit D4 of the configuration register is set to 1. Any channel select command 0XXXb, wake up
command or the set default mode command 1111b can also wake up the device from auto nap power-down.
NOTE:
1. This wake-up command is the word 1011b in the command word. This command sets bits
D2 and D3 to 1 in the configuration register but not D4. But a wake-up command does
remove the device from either one of these power-down states, deep/nap/auto nap
power-down.
2. Wake-up time is defined as the time between when the host processor tries to wake up the
converter and when a convert start can occur.
Table 2. Power-Down Mode Comparisons
POWER
TYPE OF CONSUMPTION: RESUME
POWER-DOWN 5 V/3 V ACTIVATED BY ACTIVATION TIME RESUME POWER BY TIME ENABLE
Normal operation 7 mA/5.1 mA
Deep power-down 4 nA/2 nA Setting CFR 100 ns Woken up by command 1011b 1 µ s Set CFR
Woken up by command 1011b to
Nap power-down 0.3 mA/0.25 mA Setting CFR 200 ns 3 CCLKs Set CFR
achieve 6.6 mA since (1.3 + 12)/2 = 6.6
Woken up by CONVST, any channel
Auto nap EOC (end of
200 ns select command, default command 3 CCLKs Set CFR
power-down conversion)
1111b, or wake up command 1011b.
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