Datasheet

CONFIGURE
READResult READResult
EOS
EOC EOS
Nth
Nth from#1
Nthfrom#1
Nthfrom#1
Nthfrom#1 Nthfrom#1Nthfrom#2
Nthfrom#3
Nthfrom#2 Nthfrom#1
1110............ 1101b
1101b
1
16
1
16
1
16
Cascaded ManualTrigger/ReadWhileSampling
(UseinternalCCLK,EOC,and polarityprogrammedasactivelow)
heldlowduringtheNtimes16bitstransfercycle.
INT
CS
CONVST #1,
CONVST
CONVST
#2,
#3
EOC#1
(activelow)
INT #1
(active low)
CS/FS#3
SCLK#1,
SCLK#2,
SCLK#3
SDO#1,
CDI#2
SDO#2,
CDI#3
SDO#3
SDI#1,
SDI#2,
SDI#3
CS/FS#1
CS/FS#2
SCLK#2,
t
CONV
=18CCLKs
t
SAMPLE1
=3CCLKsmin
t =
20nsmin
d(EOS-CSF)
t
d(EOS-CSF)
=
20nsmin
t
d(CSR-EOS)
=20nsmin
t =
20nsmin
d(CSR-EOS)
t
d(CSR-EOS)
=
20nsmin
t
d(EOS-CSF)
=20nsmin
ADS8327
ADS8328
SLAS415E – APRIL 2006– REVISED JANUARY 2011 www.ti.com
Figure 61. Simplified Cascade Mode Timing with Shared CONVST and Discrete CS
Figure 62 shows a slightly different scenario where CONVST is not shared by the second converter. Converters
#1 and #3 have the same CONVST signal. In this case, converter #2 simply passes previous conversion data
downstream.
34 Submit Documentation Feedback © 2006–2011, Texas Instruments Incorporated
Product Folder Link(s): ADS8327 ADS8328