Datasheet
10W
50W
OPA365
48pF
1000pF
1nF
10W
50W
OPA365
48pF
1000pF
+IN
-IN
ADS8326
10W
50W
OPA365
48pF
1000pF
50W
48pF
+IN
-IN
ADS8326
Single-Ended
Differential
ADS8326
www.ti.com
.................................................................................................................................................. SBAS343C –MAY 2007–REVISED SEPTEMBER 2009
The input current required by the analog inputs
depends on a number of factors: sample rate, input
voltage, source impedance, and power-down mode.
Essentially, the current into the ADS8326 charges the
internal capacitor array during the sample period.
After this capacitance has been fully charged, there is
no further input current. The source of the analog
input voltage must be able to charge the input
capacitance (48pF) to a 16-bit settling level within 4.5
clock cycles (0.750μs). When the converter goes into
Hold mode, or while it is in Power-Down mode, the
input impedance is greater than 1GΩ.
Care must be taken regarding the absolute analog
input voltage. To maintain the linearity of the
converter, the –IN input should not drop below GND –
0.3V or exceed GND + 0.5V. The +IN input should
always remain within the range of GND – 0.3V to V
DD
+ 0.3V, or –IN to –IN + V
REF
, whichever limit is
reached first. Outside of these ranges, the converter
linearity may not meet specifications. To minimize
noise, low bandwidth input signals with low-pass
filters should be used. In each case, care should be
taken to ensure that the output impedance of the
sources driving the +IN and –IN inputs are matched.
Figure 41. Single-Ended and Differential Methods
Often, a small capacitor (20pF) between the positive
of Interfacing the ADS8326
and negative inputs helps to match their impedance.
To obtain maximum performance from the ADS8326,
the input circuit from Figure 41 is recommended.
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Product Folder Link(s): ADS8326