Datasheet

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7FFE
4005
7FFF
476
519
8000
Code
8001
00
7FFD
V
DD
=5.0V
V
REF
=5.0V
100W
OPA340
20pF
47 Fm
ADS8325
5kW
V
REF
NOISE
7FFE
3499
7FFF
683
649
90 79
8000
Code
80017FFD
V
DD
=2.7V
V
REF
=2.5V
ADS8325
SBAS226C – MARCH 2002 – REVISED AUGUST 2007
With lower reference voltages, extra care should be dividing the number of codes measured by 6 and this
taken to provide a clean layout including adequate will yield the ±3 σ distribution, or 99.7%, of all codes.
bypassing, a clean power supply, a low-noise Statistically, up to three codes could fall outside the
reference, and a low-noise input signal. Due to the distribution when executing 1000 conversions. The
lower LSB size, the converter will also be more ADS8325, with < 3 output codes for the ±3 σ
sensitive to external sources of error, such as nearby distribution, will yield a < ± 0.5LSBs of transition noise.
digital signals and electromagnetic interference. Remember, to achieve this low-noise performance,
the peak-to-peak noise of the input signal and
The equivalent input circuit for the reference voltage
reference must be < 50 μ V.
is presented in Figure 33 . The 5k Ω resistor presents
a constant load during the conversion process. At the
same time, an equivalent capacitor of 20pF is
switched. To obtain optimum performance from the
ADS8325, special care must be taken in designing
the interface circuit to the reference input pin. To
ensure a stable reference voltage, a 47 μ F tantalum
capacitor with low ESR should be connected as close
as possible to the input pin. If a high output
impedance reference source is used, an additional
operational amplifier with a current limiting resistor
must be placed in front of the capacitors.
Figure 34. 5000 Conversion Histogram of a DC
Input
Figure 33. Input Reference Circuit and its
Interface
When the ADS8325 is in power-down mode, the input
resistance of the reference pin will have a value of
5G Ω . Since the input capacitors must be recharged
before the next conversion starts, an operational
amplifier with good dynamic characteristics must be
used to buffer the reference input.
The transition noise of the ADS8325 itself is
extremely low (see Figure 34 and Figure 35 ); it is
much lower than competing A/D converters. These
histograms were generated by applying a low-noise
DC input and initiating 5000 conversions. The digital
Figure 35. 5000 Conversion Histogram of a DC
output of the A/D converter will vary in output code
Input
due to the internal noise of the ADS8325. This is true
for all 16-bit, SAR-type A/D converters. Using a
histogram to plot the output codes, the distribution
should appear bell-shaped with the peak of the bell
curve representing the nominal code for the input
value. The ± 1 σ , ± 2 σ , and ± 3 σ distributions will
represent the 68.3%, 95.5%, and 99.7%, respectively,
of all codes. The transition noise can be calculated by
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Product Folder Link(s): ADS8325