Datasheet

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6 Power Supplies
Power Supplies
Table 4. Data Bus Connector J3
Connector.Pin
(1)
Signal Description
J3.1 D0 Buffered data bit 0 (LSB)
J3.3 D1 Buffered data bit 1
J3.5 D2 Buffered data bit 2
J3.7 D3 Buffered data bit 3
J3.9 D4 Buffered data bit 4
J3.11 D5 Buffered data bit 5
J3.13 D6 Buffered data bit 6
J3.15 D7 Buffered data bit 7
J3.17 D8 Buffered data bit 8
J3.19 D9 Buffered data bit 9
J3.21 D10 Buffered data bit 10
J3.23 D11 Buffered data bit 11
J3.25 D12 Buffered data bit 12
J3.27 D13 Buffered data bit 13
J3.29 D14 Buffered data bit 14
J3.31 D15 Buffered data bit 15 (MSB)
(1)
All even-numbered pins of J3 are tied to DGND.
This evaluation module provides direct access to all the analog-to-digital converter control signals via
connector J4, see Table 5 .
Table 5. Converter Control Connector J4
Connector.Pin
(1)
Signal Description
J4.1 CS Chip Select pin. Active low
J4.3 RD Read Pin. Active low
J4.5 CONVST Convert start pin. Active low
J4.7 BYTE BYTE mode pin. Used for 8-bit buses
J4.9 CLK Conversion clock
J4.11 BUSY Converter Status Output. High when a conversion is in progress
(1)
All even-numbered pins of J4 are tied to DGND.
The EVM accepts four power supplies.
• A dual ± Vs dc supply for the dual supply operational amplifiers. Recommend ± 12-Vdc supply.
• A single +5-Vdc supply for analog section of the board (A/D ).
• A single +5-Vdc supply for digital section of the board (A/D + address decoder + buffers).
There are two ways to provide these voltages.
1. Wire in voltages at test points on the EVM. See Table 6 .
Table 6. Power Supply Test Points
Test Point Signal Description
TP16 +5VD Apply +5 Vdc.
TP13 +5VA Apply +5 Vdc.
ADS8323EVMSLAU087A – July 2002 – Revised December 2004 5