Datasheet

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5 Digital Interface
Digital Interface
Table 2. Jumper Setting
Reference Description Jumper Settings
Designator
1-2 2-3
W1 Short REFout (on-chip reference) to REFin pin Installed
(1)
Short external reference to REFin Installed
W2 Short R11 to U4 pin 2 Installed N/A
W3 Short R12 to U6 pin 2 Installed N/A
W4 Short U6 output to –IN Installed
Short REFout to –IN Installed
(1)
W5 Set A[2..0]=0x1 generates RD signal Installed
(1)
Set A[2..0]=0x2 generates RD signal Installed
W6 Set A[2..0]=0x3 generates CONVST signal Installed
(1)
Set A[2..0]=0x4 generates CONVST signal Installed
W7 Short DC_CS to A/D chip select Installed
(1)
N/A
(1)
Factory-installed setting
The ADS8323EVM is designed for easy interfacing to multiple platforms. Samtec part numbers
SSW-110-22-F-D-VS-K , TSM-110-01-T-DV-P, SSW-116-22-S-D-VS , and TSM-116-01-T-D-V-P provide a
convenient dual-row header/socket combination at J1, J2, and J3. Consult Samtec at
http://www.samtec.com or 1-800-SAMTEC-9 for mating connector options.
Parallel Control J2 allows the user to plug the EVM into the 5-6K Interface Board to interface directly to
TMS320C5000 and TMS320C6000 series of DSPs. See Table 3 for the J2 connector pinout.
Table 3. Pinout for Parallel Control Connector J2
Connector.Pin
(1)
Signal Description
J2.1 DC_CS Daughtercard Select pin
J2.3
J2.5
J2.7 A0 Address line from processor
J2.9 A1 Address line from processor
J2.11 A2 Address line from processor
J2.13
J2.15
J2.17 CLK ADC conversion Clock
J2.19 BUSY Busy signal from converter. W4 must be shorted.
(1)
All even-numbered pins of J2 are tied to DGND.
The Read ( RD), Conversion Start ( CONVST) signals to the converter can be assigned to two different
addresses in memory via jumper settings. This allows for the stacking of up to two ADS8323EVMs in
processor memory. See Table 2 for jumper settings. The evaluation module ships with the Chip Select
( CS) line of the converter shorted to daughtercard Chip Select signal and the RD and CONVST signals
shorted to decoder outputs one and three, respectively.
The data bus is available at connector J3; see Table 4 for pinout information.
4 SLAU087A – July 2002 – Revised December 2004ADS8323EVM